"Power Optimized Design Framework for FPGA Clusters."

Kensuke Iizuka et al. (2024)

> Home

Details and statistics

DOI: 10.2197/IPSJTSLDM.17.77

access: closed

type: Journal Article

metadata version: 2024-08-08

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/ipsj/IizukaIYA24
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ipsj/IizukaIYA24
Kensuke Iizuka, Kohei Ito, Ryota Yasudo, Hideharu Amano:
Power Optimized Design Framework for FPGA Clusters. IPSJ Trans. Syst. LSI Des. Methodol. 17: 77-86 (2024)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.