"Very Compact and Efficient 32-Bit AES Core Design Using FPGAs for ..."

Raed Bani-Hani, Khaldoon Mhaidat, Salah S. Harb (2016)

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DOI: 10.1142/S0218126616500808

access: closed

type: Journal Article

metadata version: 2020-11-16

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Raed Bani-Hani, Khaldoon Mhaidat, Salah S. Harb:
Very Compact and Efficient 32-Bit AES Core Design Using FPGAs for Small-Footprint Low-Power Embedded Applications. J. Circuits Syst. Comput. 25(7): 1650080:1-1650080:17 (2016)

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