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"A 3.3 V 32 Mb NAND flash memory with incremental step pulse programming ..."

Kang-Deog Suh et al. (1995)

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DOI: 10.1109/4.475701

access: closed

type: Journal Article

metadata version: 2023-05-03

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  - journals/jssc/SuhSLKCKLKCYCKL95
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  persistent URL:
  - https://dblp.org/rec/journals/jssc/SuhSLKCKLKCYCKL95
Kang-Deog Suh, Byung-Hoon Suh, Young-Ho Lim, Jin-Ki Kim, Young-Joon Choi, Yong-Nam Koh, Sung-Soo Lee, Suk-Chon Kwon, Byung-Soon Choi, Jin-Sun Yum, Jung-Hyuk Choi, Jang-Rae Kim, Hyung-Kyu Lim:
A 3.3 V 32 Mb NAND flash memory with incremental step pulse programming scheme. IEEE J. Solid State Circuits 30(11): 1149-1156 (1995)

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