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ORCID"High-speed reduced-leakage SRAM memory cell design techniques for ..."
Deepon Saha, Subir Kumar Sarkar (2014)
- Deepon Saha, Subir Kumar Sarkar:
High-speed reduced-leakage SRAM memory cell design techniques for low-power 65 nm FD-SOI/SON CMOS technology. Microelectron. J. 45(7): 848-856 (2014)
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