"Multi-valued logic mapping of resistive short and open delay-fault testing ..."

M. Reza Javaheri, Reza Sedaghat (2009)

> Home

Details and statistics

DOI: 10.1016/J.MICROREL.2008.11.010

access: closed

type: Journal Article

metadata version: 2020-02-22

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/mr/JavaheriS09
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/mr/JavaheriS09
M. Reza Javaheri, Reza Sedaghat:
Multi-valued logic mapping of resistive short and open delay-fault testing in deep sub-micron technologies. Microelectron. Reliab. 49(2): 178-185 (2009)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.