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"Test Access Mechanism Optimization, Test Scheduling, and Tester Data ..."

Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen (2003)

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DOI: 10.1109/TC.2003.1252857

access: closed

type: Journal Article

metadata version: 2024-02-05

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  - https://dblp.org/rec/journals/tc/IyengarCM03
Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen:
Test Access Mechanism Optimization, Test Scheduling, and Tester Data Volume Reduction for System-on-Chip. IEEE Trans. Computers 52(12): 1619-1632 (2003)

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