


default search action
"Reducing Transistor Count in CMOS Logic Design Through Clustering and ..."
Anup Kumar Biswas, Dimitri Kagaris (2025)
- Anup Kumar Biswas

, Dimitri Kagaris
:
Reducing Transistor Count in CMOS Logic Design Through Clustering and Library-Independent Multiple-Output Logic Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 44(8): 3046-3059 (2025)

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.


Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID













