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"Delay analysis of CMOS gates using modified logical effort model."

Adnan Kabbani, Dhamin Al-Khalili, Asim J. Al-Khalili (2005)

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DOI: 10.1109/TCAD.2005.847892

access: closed

type: Journal Article

metadata version: 2020-09-24

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  - journals/tcad/KabbaniAA05
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  - https://dblp.org/rec/journals/tcad/KabbaniAA05
Adnan Kabbani, Dhamin Al-Khalili, Asim J. Al-Khalili:
Delay analysis of CMOS gates using modified logical effort model. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(6): 937-947 (2005)

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