"A layout synthesis methodology for array-type analog blocks."

Geert Van der Plas et al. (2002)

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DOI: 10.1109/TCAD.2002.1004309

access: closed

type: Journal Article

metadata version: 2020-09-24

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Geert Van der Plas, Jan Vandenbussche, Georges G. E. Gielen, Willy M. C. Sansen:
A layout synthesis methodology for array-type analog blocks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(6): 645-661 (2002)

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