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Willy M. C. Sansen
Willy Sansen
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- affiliation: Catholic University of Leuven, Belgium
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2010 – 2019
- 2017
- [j52]Alfio Dario Grasso, Gaetano Palumbo, Salvatore Pennisi, Willy Sansen:
The noise performance of CMOS Miller operational transconductance amplifiers with embedded current-buffer frequency compensation. Int. J. Circuit Theory Appl. 45(4): 457-465 (2017) - 2015
- [c76]Willy Sansen:
1.3 Analog CMOS from 5 micrometer to 5 nanometer. ISSCC 2015: 1-6 - 2014
- [c75]Willy Sansen:
SC1: Biomedical and sensor interface circuits. ISSCC 2014: 528 - [c74]Franz Dielacher, Marc Tiebout, Rudolf Lachner, Herbert Knapp, Klaus Aufinger, Willy Sansen:
SiGe BiCMOS technology and circuits for active safety systems. VLSI-DAT 2014: 1-4 - 2013
- [c73]Sami Issa, Willy M. C. Sansen, Dennis Sylvester:
Keynote lectures. ICECS 2013 - [c72]Willy M. C. Sansen:
Analog design procedures for channel lengths down to 20 nm. ICECS 2013: 337-340 - [c71]Willy Sansen, Hooman Darabi, John R. Long, Ali Hajimiri, Ali M. Niknejad:
RF blocks for wireless transceivers. ISSCC 2013: 518 - 2012
- [c70]Willy Sansen, Christian C. Enz, Boris Murmann, Philip K. T. Mok:
Low-power analog signal processing. ISSCC 2012: 518 - 2011
- [j51]Xiaohong Peng, Willy Sansen, Ligang Hou, Jinhui Wang, Wuchen Wu:
Impedance Adapting Compensation for Low-Power Multistage Amplifiers. IEEE J. Solid State Circuits 46(2): 445-451 (2011) - 2010
- [c69]Don Draper, Fabio Campi, Ram Krishnamurthy, Takashi Miyamori, Shannon Morton, Willy Sansen, Vladimir Stojanovic, John T. Stonick:
Signal and power integrity for SoCs. ISSCC 2010: 520 - [c68]Vaidyanathan Subramanian, Abdelkarim Mercha, Bertrand Parvais, Morin Dehan, Guido Groeseneken, Willy M. C. Sansen, Stefaan Decoutere:
Identifying the Bottlenecks to the RF Performance of FinFETs. VLSI Design 2010: 111-116
2000 – 2009
- 2009
- [j50]Ybe Creten, Patrick Merken, Willy Sansen, Robert P. Mertens, Chris Van Hoof:
An 8-Bit Flash Analog-to-Digital Converter in Standard CMOS Technology Functional From 4.2 K to 300 K. IEEE J. Solid State Circuits 44(7): 2019-2025 (2009) - [j49]Libin Yao, Michiel S. J. Steyaert, Willy Sansen:
Erratum to "A 1-V 140-μW 88-dB Audio Sigma-Delta Modulator in 90-nm CMOS". IEEE J. Solid State Circuits 44(11): 3211 (2009) - [c67]Willy M. C. Sansen:
Analog IC Design in Nanometer CMOS Technologies. VLSI Design 2009: 4 - 2008
- [j48]Bram Nauta, Willy Sansen:
Retraction of Papers With Falsified Information. IEEE J. Solid State Circuits 43(6): 1339 (2008) - [c66]Ybe Creten, Patrick Merken, Robert Mertens, Willy Sansen, Chris Van Hoof:
An 8-bit Flash Analog-to-Digital Converter in standard CMOS technology functional in ultra wide temperature range from 4.2 K to 300 K. ESSCIRC 2008: 274-277 - 2007
- [j47]Raf Schoofs, Michiel Steyaert, Willy M. C. Sansen:
A Design-Optimized Continuous-Time Delta-Sigma ADC for WLAN Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(1): 209-217 (2007) - [c65]Tom Eeckelaert, Raf Schoofs, Georges G. E. Gielen, Michiel Steyaert, Willy M. C. Sansen:
An efficient methodology for hierarchical synthesis of mixed-signal systems with fully integrated building block topology selection. DATE 2007: 81-86 - [c64]Bertrand Parvais, Vaidyanathan Subramanian, Abdelkarim Mercha, Morin Dehan, Piet Wambacq, Willy Sansen, Guido Groeseneken, Stefaan Decoutere:
FinFET technology for analog and RF circuits. ICECS 2007: 182-185 - [c63]Ybe Creten, Patrick Merken, Willy Sansen, Robert Mertens, Chris Van Hoof:
A Cryogenic ADC operating Down to 4.2K. ISSCC 2007: 468-616 - 2006
- [c62]Tom Eeckelaert, Raf Schoofs, Georges G. E. Gielen, Michiel Steyaert, Willy M. C. Sansen:
Hierarchical bottom--up analog optimization methodology validated by a delta-sigma A/D converter design for the 802.11a/b/g standard. DAC 2006: 25-30 - [c61]Raf Schoofs, Tom Eeckelaert, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen:
A Continuous-Time Delta-Sigma Modulator for 802.11a/b/g WLAN Implemented with a Hierarchical Bottom-up Optimization Methodology. ICECS 2006: 950-953 - [c60]Raf Schoofs, Michiel Steyaert, Willy M. C. Sansen:
A 7.5mW, 11-bit continuous-time sigma-delta A/D converter for WLAN applications. ISCAS 2006 - 2005
- [j46]Xiaohong Peng, Willy Sansen:
Transconductance with capacitances feedback compensation for multistage amplifiers. IEEE J. Solid State Circuits 40(7): 1514-1520 (2005) - [j45]Bjørnar Hernes, Willy M. C. Sansen:
Distortion in single-, two- and three-stage amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(5): 846-856 (2005) - 2004
- [j44]Libin Yao, Michiel S. J. Steyaert, Willy Sansen:
A 1-V 140-μW 88-dB audio sigma-delta modulator in 90-nm CMOS. IEEE J. Solid State Circuits 39(11): 1809-1818 (2004) - [j43]Xiaohong Peng, Willy Sansen:
AC boosting compensation scheme for low-power multistage amplifiers. IEEE J. Solid State Circuits 39(11): 2074-2079 (2004) - [j42]Jurgen Deveugele, Geert Van der Plas, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen:
A gradient-error and edge-effect tolerant switching scheme for a high-accuracy DAC. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(1): 191-195 (2004) - [j41]Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen:
Efficient analysis of slow-varying oscillator dynamics. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(8): 1457-1467 (2004) - [c59]Xiaohong Peng, Willy Sansen:
Transconductance with capacitances feedback compensation for multistage amplifiers. ESSCIRC 2004: 143-146 - 2003
- [j40]Mustafa Badaroglu, Stéphane Donnay, Hugo J. De Man, Yann A. Zinzius, Georges G. E. Gielen, Willy Sansen, Tony Fondén, Svante Signell:
Modeling and experimental verification of substrate noise generation in a 220-Kgates WLAN system-on-chip with multiple supplies. IEEE J. Solid State Circuits 38(7): 1250-1260 (2003) - [j39]Wim Claes, Michel De Cooman, Willy Sansen, Robert Puers:
A 136-μW/channel autonomous strain-gauge datalogger. IEEE J. Solid State Circuits 38(12): 2280-2287 (2003) - [j38]Manuel Innocent, Piet Wambacq, Stéphane Donnay, Harrie A. C. Tilmans, Willy M. C. Sansen, Hugo De Man:
An analytic Volterra-series-based model for a MEMS variable capacitor. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(2): 124-131 (2003) - [j37]Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen:
Simulation-based generation of posynomial performance models for the sizing of analog integrated circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(5): 517-534 (2003) - [j36]Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen:
Behavioral modeling of (coupled) harmonic oscillators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(8): 1017-1026 (2003) - [j35]Walter Daems, Bart De Smedt, Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen, Hugo De Man:
PeopleMover: an example of interdisciplinary project-based education in electrical engineering. IEEE Trans. Educ. 46(1): 157-167 (2003) - [c58]Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen:
Time-Varying, Frequency-Domain Modeling and Analysis of Phase-Locked Loops with Sampling Phase-Frequency Detectors. DATE 2003: 10238-10243 - [c57]Tom Eeckelaert, Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen:
Generalized Posynomial Performance Modeling. DATE 2003: 10250-10255 - [c56]Yann A. Zinzius, Georges G. E. Gielen, Willy Sansen:
Modelling impact of digital substrate noise on embedded regenerative comparators. ESSCIRC 2003: 253-256 - [c55]Libin Yao, Michiel Steyaert, Willy Sansen:
A 0.8-V, 8-μW, CMOS OTA with 50-dB gain and 1.2-MHz GBW in 18-pF load. ESSCIRC 2003: 297-300 - [c54]João Ramos, Xiaohong Peng, Michiel Steyaert, Willy Sansen:
Three stage amplifier frequency compensation. ESSCIRC 2003: 365-368 - [c53]Manuel Innocent, Piet Wambacq, Stéphane Donnay, Willy Sansen, Hugo De Man:
A linear high voltage charge pump for MEMs applications in 0.18μm CMOS technology. ESSCIRC 2003: 457-460 - [c52]Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen:
A Generalized Method for Computing Oscillator Phase Noise Spectra. ICCAD 2003: 247-250 - 2002
- [j34]Jeroen A. Croon, Maarten Rosmeulen, Stefaan Decoutere, Willy Sansen, Herman E. Maes:
An easy-to-use mismatch model for the MOS transistor. IEEE J. Solid State Circuits 37(8): 1056-1064 (2002) - [j33]Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen:
Circuit simplification for the symbolic analysis of analogintegrated circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(4): 395-407 (2002) - [j32]Geert Van der Plas, Jan Vandenbussche, Georges G. E. Gielen, Willy M. C. Sansen:
A layout synthesis methodology for array-type analog blocks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(6): 645-661 (2002) - [j31]Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen:
Symbolic modeling of periodically time-varying systems usingharmonic transfer matrices. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(9): 1011-1024 (2002) - [j30]Carl De Ranter, Geert Van der Plas, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen:
CYCLONE: automated design and layout of RF LC-oscillators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(10): 1161-1170 (2002) - [c51]Xiaohong Peng, Willy Sansen:
Nested feed-forward Gm-stage and ing resistor plus nested-Miller compensation for multistage amplifiers. CICC 2002: 329-332 - [c50]Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen:
An efficient optimization--based technique to generate posynomial performance models for analog integrated circuits. DAC 2002: 431-436 - [c49]Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen:
Behavioral modeling of (coupled) harmonic oscillators. DAC 2002: 536-541 - [c48]Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen:
A Fitting Approach to Generate Symbolic Expressions for Linear and Nonlinear Analog Circuit Performance Characteristics. DATE 2002: 268-273 - [c47]Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen:
Constructing Symbolic Models for the Input/Output Behavior of Periodically Time-Varying Systems Using Harmonic Transfer Matrices. DATE 2002: 279-284 - [c46]Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen:
On the difference between two widely publicized methods for analyzing oscillator phase behavior. ICCAD 2002: 229-233 - [c45]Francky Leyn, Erik Lauwers, Martin Vogels, Georges G. E. Gielen, Willy M. C. Sansen:
Regression criteria and their application in different modeling cases. ISCAS (5) 2002: 85-8 - 2001
- [j29]Anne Van den Bosch, Marc A. F. Borremans, Michel S. J. Steyaert, Willy Sansen:
A 10-bit 1-GSample/s Nyquist current-steering CMOS D/A converter. IEEE J. Solid State Circuits 36(3): 315-324 (2001) - [j28]Erik Lauwers, Jan Suls, Walter Gumbrecht, David Maes, Georges G. E. Gielen, Willy Sansen:
A CMOS multiparameter biochemical microsensor with temperature control and signal interfacing. IEEE J. Solid State Circuits 36(12): 2030-2038 (2001) - [j27]Geert Van der Plas, Geert Debyser, Francky Leyn, Koen Lampaert, Jan Vandenbussche, Georges G. E. Gielen, Willy M. C. Sansen, Petar Veselinovic, Domine Leenaerts:
AMGIE-A synthesis environment for CMOS analog integrated circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(9): 1037-1058 (2001) - [c44]Wim Claes, Willy Sansen, Robert Puers:
A 40 μA/channel compensated 18-channel strain gauge measurement system for stress monitoring in dental implants. CICC 2001: 101-104 - [c43]Marc Borremans, Anne Van den Bosch, Michiel Steyaert, Willy Sansen:
A low power, 10-bit CMOS D/A converter for high speed applications. CICC 2001: 157-160 - [c42]Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen:
Efficient time-domain simulation of telecom frontends using a complex damped exponential signal model. DATE 2001: 169-175 - [c41]Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen:
Simulation-Based Automatic Generation of Signomial and Posynomial Performance Models for Analog Integrated Circuit Sizing. ICCAD 2001: 70-74 - [c40]Peter J. Vancorenland, Geert Van der Plas, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen:
A Layout-Aware Synthesis Methodology for RF Circuits. ICCAD 2001: 358- - 2000
- [j26]Yves Geerts, Michel S. J. Steyaert, Willy Sansen:
A high-performance multibit ΔΣ CMOS ADC. IEEE J. Solid State Circuits 35(12): 1829-1840 (2000) - [c39]Yves Geerts, Michiel Steyaert, Willy Sansen:
A 12-bit 12.5 MS/s multi-bit ΔΣ CMOS ADC. CICC 2000: 21-24 - [c38]Anne Van den Bosch, Melissa Borremans, Michiel Steyaert, Willy Sansen:
A 10-bit 1-GSample/s Nyquist current-steering CMOS D/A converter. CICC 2000: 265-268 - [c37]Carl De Ranter, Bram De Muer, Geert Van der Plas, Peter J. Vancorenland, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen:
CYCLONE: automated design and layout of RF LC-oscillators. DAC 2000: 11-14 - [c36]Geert Van der Plas, Jan Vandenbussche, Walter Daems, Antal van den Bosch, Georges G. E. Gielen, Willy M. C. Sansen:
Systematic design of a 14-bit 150-MS/s CMOS current-steering D/A converter. DAC 2000: 452-457 - [c35]Anne Van den Bosch, Michiel Steyaert, Willy Sansen:
An accurate statistical yield model for CMOS current-steering D/A converters. ISCAS 2000: 105-108 - [c34]Anne Van den Bosch, Michiel Steyaert, Willy Sansen:
The extraction of transistor mismatch parameters: the CMOS current-steering D/A converter as a test structure. ISCAS 2000: 745-748
1990 – 1999
- 1999
- [j25]Yves Geerts, Augusto Manuel Marques, Michel S. J. Steyaert, Willy Sansen:
A 3.3-V, 15-bit, delta-sigma ADC with a signal bandwidth of 1.1 MHz for ADSL applications. IEEE J. Solid State Circuits 34(7): 927-936 (1999) - [j24]Geert Van der Plas, Jan Vandenbussche, Willy Sansen, Michel S. J. Steyaert, Georges G. E. Gielen:
A 14-bit intrinsic accuracy Q2 random walk CMOS DAC. IEEE J. Solid State Circuits 34(12): 1708-1718 (1999) - [c33]Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen:
Circuit Complexity Reduction for Symbolic Analysis of Analog Integrated Circuits. DAC 1999: 958-963 - [c32]Anne Van den Bosch, Michiel Steyaert, Willy Sansen:
SFDR-bandwidth limitations for high speed high resolution current steering CMOS D/A converters. ICECS 1999: 1193-1196 - [c31]Stéphane Donnay, Marc van Heijningen, Mustafa Badaroglu, Wim Diels, Marc Engels, Ivo Bolsens, Yann A. Zinzius, Georges G. E. Gielen, Willy Sansen, Tony Fondén, Svante Signell:
BANDIT: embedding analog-to-digital converters on digital telecom ASICs. ICECS 1999: 1377-1380 - [c30]Geert Van der Plas, Jan Vandenbussche, Wim Verhaegen, Georges G. E. Gielen, Willy Sansen:
Statistical behavioral modeling for A/D-converters. ICECS 1999: 1713-1716 - 1998
- [j23]Stéphane Donnay, Georges G. E. Gielen, Willy M. C. Sansen:
High-Level Power Minimization of Analog Sensor Interface Architectures. Integr. Comput. Aided Eng. 5(4): 303-314 (1998) - [j22]Augusto Manuel Marques, Vincenzo Peluso, Michel S. J. Steyaert, Willy Sansen:
A 15-b resolution 2-MHz Nyquist rate ΔΣ ADC in a 1-μm CMOS technology. IEEE J. Solid State Circuits 33(7): 1065-1075 (1998) - [j21]Vincenzo Peluso, Peter J. Vancorenland, Augusto Manuel Marques, Michel S. J. Steyaert, Willy Sansen:
A 900-mV low-power ΔΣ A/D converter with 77-dB dynamic range. IEEE J. Solid State Circuits 33(12): 1887-1897 (1998) - [j20]José Bastos, Augusto Manuel Marques, Michel S. J. Steyaert, Willy Sansen:
A 12-bit intrinsic accuracy high-speed CMOS DAC. IEEE J. Solid State Circuits 33(12): 1959-1969 (1998) - [j19]Zhihua Wang, Georges G. E. Gielen, Willy M. C. Sansen:
Probabilistic fault detection and the selection of measurements for analog integrated circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(9): 862-872 (1998) - [j18]Augusto Manuel Marques, Michiel S. J. Steyaert, Willy M. C. Sansen:
Theory of PLL fractional-N frequency synthesizers. Wirel. Networks 4(1): 79-85 (1998) - [c29]Anne Van den Bosch, Marc Borremans, Jan Vandenbussche, Geert Van der Plas, Augusto Manuel Marques, José Bastos, Michiel Steyaert, Georges G. E. Gielen, Willy Sansen:
A 12 bit 200 MHz low glitch CMOS D/A converter. CICC 1998: 249-252 - [c28]Francky Leyn, Willy Sansen, Georges G. E. Gielen:
Transforming small-signal modeling into control system modeling. CICC 1998: 469-472 - [c27]Jan Vandenbussche, Geert Van der Plas, Georges G. E. Gielen, Michiel Steyaert, Willy Sansen:
Behavioral model for D/A converters as VSI virtual components. CICC 1998: 473-476 - [c26]Geert Van der Plas, Jan Vandenbussche, Georges G. E. Gielen, Willy Sansen:
Mondriaan: a tool for automated layout synthesis of array-type analog blocks. CICC 1998: 485-488 - [c25]Jan Vandenbussche, Stéphane Donnay, Francky Leyn, Georges G. E. Gielen, Willy M. C. Sansen:
Hierarchical Top-Down Design of Analog Sensor Interfaces: From System-Level Specifications Down to Silicon. DATE 1998: 716-720 - [c24]Francky Leyn, Georges G. E. Gielen, Willy M. C. Sansen:
An efficient DC root solving algorithm with guaranteed convergence for analog integrated CMOS circuits. ICCAD 1998: 304-307 - [c23]Augusto Manuel Marques, José Bastos, Michiel Steyaert, Willy Sansen:
A current steering architecture for 12-bit high-speed D/A converters. ICECS 1998: 23-26 - [c22]Augusto Manuel Marques, Valentino Peluso, Michiel Steyaert, Willy M. C. Sansen:
Analysis of the trade-off between bandwidth, resolution, and power in ΔΣ analog to digital converters. ICECS 1998: 153-156 - [c21]Augusto Manuel Marques, Yves Geerts, Michiel Steyaert, Willy Sansen:
Settling time analysis of third order systems. ICECS 1998: 505-508 - 1997
- [j17]Vincenzo Peluso, Michiel S. J. Steyaert, Willy Sansen:
A 1.5-V-100-μW ΔΣ modulator with 12-b dynamic range using the switched-opamp technique. IEEE J. Solid State Circuits 32(7): 943-952 (1997) - [j16]Wim Dehaene, Michiel S. J. Steyaert, Willy Sansen:
A 50-MHz standard CMOS pulse equalizer for hard disk read channels. IEEE J. Solid State Circuits 32(7): 977-988 (1997) - [j15]Giuseppe Ferri, Willy Sansen:
A rail-to-rail constant-gm low-voltage CMOS operational transconductance amplifier. IEEE J. Solid State Circuits 32(10): 1563-1567 (1997) - [c20]Stéphane Donnay, Georges G. E. Gielen, Willy M. C. Sansen, Wim Kruiskamp, Domine Leenaerts, W. van Bokhoven:
High-level synthesis of analog sensor interface front-ends. ED&TC 1997: 56-60 - [c19]Francky Leyn, Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen:
A behavioral signal path modeling methodology for qualitative insight in and efficient sizing of CMOS opamps. ICCAD 1997: 374-381 - 1996
- [c18]L. Richard Carley, Georges G. E. Gielen, Rob A. Rutenbar, Willy M. C. Sansen:
Synthesis Tools for Mixed-Signal ICs: Progress on Frontend and Backend Strategies. DAC 1996: 298-303 - [c17]Philippe Reynaert, Ludwig Callewaert, Georges G. E. Gielen, Geert Debyser, Koen Lampaert, Francky Leyn, Geert Van der Plas, Willy Sansen, Birger Schneider, René Bloch, Dave Orton, Steve Boardman, Jeremy Stent, Jean-François Agaësse, Jörg-Olliver Fischer-Binder, Jukka Riihiaho, Kari Tukkiniemi:
ADMIRE: advanced mixed signal design environment. ICECS 1996: 428-431 - [c16]Giuseppe Ferri, Willy Sansen, Gian Carlo Cardarilli:
A low-voltage reduced-power constant-gm rail-to-rail fully differential CMOS op-amp. ICECS 1996: 1170-1173 - 1995
- [j14]Georges G. E. Gielen, Geert Debyser, Koen Lampaert, Francky Leyn, Koen Swings, Geert Van der Plas, Willy Sansen, Domine Leenaerts, Petar Veselinovic, W. van Bokhoven:
An analogue module generator for mixed analogue/digital asic design. Int. J. Circuit Theory Appl. 23(4): 269-283 (1995) - [j13]Piet Wambacq, Francisco V. Fernández, Georges G. E. Gielen, Willy Sansen, Ángel Rodríguez-Vázquez:
Efficient symbolic computation of approximated small-signal characteristics of analog integrated circuits. IEEE J. Solid State Circuits 30(3): 327-330 (1995) - [j12]Koen Lampaert, Georges G. E. Gielen, Willy M. C. Sansen:
A performance-driven placement tool for analog integrated circuits. IEEE J. Solid State Circuits 30(7): 773-780 (1995) - [c15]Koen Lampaert, Georges G. E. Gielen, Willy M. C. Sansen:
Direct Performance-Driven Placement of Mismatch-Sensitive Analog Circuits. DAC 1995: 445-449 - [c14]Petar Veselinovic, Domine Leenaerts, W. van Bokhoven, Francky Leyn, F. Proesmans, Georges G. E. Gielen, Willy Sansen:
A flexible topology selection program as part of an analog synthesis system. ED&TC 1995: 119-125 - [c13]Georges G. E. Gielen, Geert Debyser, Piet Wambacq, Koen Swings, Willy M. C. Sansen:
Use of Symbolic Analysis in Analog Circuit Synthesis. ISCAS 1995: 2205-2208 - 1994
- [j11]Wim Van Petegem, Ben Geeraerts, Willy Sansen, Benny Graindourze:
Electrothermal simulation and design of integrated circuits. IEEE J. Solid State Circuits 29(2): 143-146 (1994) - [j10]Guangming Yin, Willy Sansen:
A high-frequency and high-resolution fourth-order ΣΔ A/D converter in BiCMOS technology. IEEE J. Solid State Circuits 29(8): 857-865 (1994) - [j9]Eric J. Gerds, Jan Van der Spiegel, Richard Van Berg, Hugh H. Williams, Ludwig Callewaert, W. Eyckmans, Willy Sansen:
A CMOS time to digital converter IC with 2 level analog CAM. IEEE J. Solid State Circuits 29(9): 1068-1076 (1994) - [j8]Georges G. E. Gielen, Piet Wambacq, Willy M. C. Sansen:
Symbolic analysis methods and applications for analog circuits: a tutorial overview. Proc. IEEE 82(2): 287-304 (1994) - [c12]Stéphane Donnay, Koen Swings, Georges G. E. Gielen, Willy M. C. Sansen, Wim Kruiskamp, Domine Leenaerts:
A Methodology for Analog Design Automation in Mixed-Signal ASICs. EDAC-ETC-EUROASIC 1994: 530-534 - [c11]Georges G. E. Gielen, Zhihua Wang, Willy M. C. Sansen:
Fault detection and input stimulus determination for the testing of analog integrated circuits based on power-supply current monitoring. ICCAD 1994: 495-498 - [c10]