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"Low jitter and multirate clock and data recovery circuit using a MSADLL ..."

Hsiang-Hui Chang, Rong-Jyi Yang, Shen-Iuan Liu (2004)

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DOI: 10.1109/TCSI.2004.838147

access: closed

type: Journal Article

metadata version: 2020-05-22

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Hsiang-Hui Chang, Rong-Jyi Yang, Shen-Iuan Liu:
Low jitter and multirate clock and data recovery circuit using a MSADLL for chip-to-chip interconnection. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(12): 2356-2364 (2004)

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