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"A Hardware-Efficient Feedback Polynomial Topology for DPD Linearization of ..."

Chak-Fong Cheang, Pui-In Mak, Rui Paulo Martins (2018)

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DOI: 10.1109/TCSI.2017.2788082

access: closed

type: Journal Article

metadata version: 2020-08-06

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Chak-Fong Cheang, Pui-In Mak, Rui Paulo Martins:
A Hardware-Efficient Feedback Polynomial Topology for DPD Linearization of Power Amplifiers: Theory and FPGA Validation. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(9): 2889-2902 (2018)

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