"Unified Architecture for Double/Two-Parallel Single Precision Floating ..."

Manish Kumar Jaiswal et al. (2014)

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DOI: 10.1109/TCSII.2014.2327314

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type: Journal Article

metadata version: 2020-05-27

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Manish Kumar Jaiswal, Ray C. C. Cheung, M. Balakrishnan, Kolin Paul:
Unified Architecture for Double/Two-Parallel Single Precision Floating Point Adder. IEEE Trans. Circuits Syst. II Express Briefs 61-II(7): 521-525 (2014)

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