"An Area Efficient Radix-4 Reciprocal Dual Trellis Architecture for a ..."

Chen-Yang Lin, Cheng-Chi Wong, Hsie-Chia Chang (2015)

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DOI: 10.1109/TCSII.2014.2362733

access: closed

type: Journal Article

metadata version: 2020-05-27

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Chen-Yang Lin, Cheng-Chi Wong, Hsie-Chia Chang:
An Area Efficient Radix-4 Reciprocal Dual Trellis Architecture for a High-Code-Rate Turbo Decoder. IEEE Trans. Circuits Syst. II Express Briefs 62-II(1): 65-69 (2015)

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