"LSAC: A Low-Power Adder Tree for Digital Computing-in-Memory by Sparsity ..."

Chaojie He et al. (2024)

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DOI: 10.1109/TCSII.2023.3304752

access: closed

type: Journal Article

metadata version: 2025-05-14

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Chaojie He, Zi Wang, Feibin Xiang, Zhuoyu Dai, Yifan He, Jinshan Yue, Yongpan Liu:
LSAC: A Low-Power Adder Tree for Digital Computing-in-Memory by Sparsity and Approximate Circuits Co-Design. IEEE Trans. Circuits Syst. II Express Briefs 71(2): 852-856 (2024)

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