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"Power-Aware High-Level Synthesis With Clock Skew Management."

Tung-Hua Yeh, Sying-Jyan Wang (2012)

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DOI: 10.1109/TVLSI.2010.2091292

access: closed

type: Journal Article

metadata version: 2021-10-14

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  - https://dblp.org/rec/journals/tvlsi/YehW12
Tung-Hua Yeh, Sying-Jyan Wang:
Power-Aware High-Level Synthesis With Clock Skew Management. IEEE Trans. Very Large Scale Integr. Syst. 20(1): 167-171 (2012)

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