"Current Testing of CMOS Combinational Circuits with Single Floating Gate ..."

Víctor H. Champac, Joan Figueras (1997)

> Home

Details and statistics

DOI: 10.1155/1997/97381

access: open

type: Journal Article

metadata version: 2022-11-05

- view
  - electronic edition via DOI (open access)
  authority control:
- export record
  dblp key:
  - journals/vlsi/ChampacF97
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/vlsi/ChampacF97
Víctor H. Champac, Joan Figueras:
Current Testing of CMOS Combinational Circuits with Single Floating Gate Defects. VLSI Design 5(3): 273-284 (1997)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.