"Delay Efficient 32-Bit Carry-Skip Adder."

Yu Shen Lin, Damu Radhakrishnan (2008)

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DOI: 10.1155/2008/218565

access: open

type: Journal Article

metadata version: 2018-11-24

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  - https://dblp.org/rec/journals/vlsi/LinR08
Yu Shen Lin, Damu Radhakrishnan:
Delay Efficient 32-Bit Carry-Skip Adder. VLSI Design 2008: 218565:1-218565:8 (2008)

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