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Publication search results
found 67 matches
- 2005
- Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti:
Exploring Design Space of VLIW Architectures. ASAP 2005: 86-91 - Maria J. Avedillo, José M. Quintana, Héctor Pettenghi:
Logic Models Supporting the Design of MOBILE-based RTD Circuits. ASAP 2005: 254-259 - Lejla Batina, Nele Mentens, Bart Preneel, Ingrid Verbauwhede:
Side-channel aware design: Algorithms and Architectures for Elliptic Curve Cryptography over GF(2n). ASAP 2005: 350-355 - Valeriu Beiu, Snorre Aunet, Jabulani Nyathi, Ray Robert Rydberg III, Asbjørn Djupdal:
On the Advantages of Serial Architectures for Low-Power Reliable Computations. ASAP 2005: 276-281 - Jean-Luc Beuchat, Jean-Michel Muller:
Multiplication Algorithms for Radix-2 RN-Codings and Two's Complement Multiplication Algorithms for Radix-2 RN-Codings and Two's Complement. ASAP 2005: 303-308 - Adrian Burian, Perttu Salmela, Jarmo Takala:
Complex Fixed-Point Matrix Inversion Using Transport Triggered Architecture. ASAP 2005: 107-112 - João M. P. Cardoso:
On Estimations for Compiling Software to FPGA-based Systems. ASAP 2005: 225-230 - Samarjit Chakraborty:
Towards a Framework for System-Level Design of Multiprocessor SoC Platforms for Media Processing. ASAP 2005: 65-72 - Karim Ben Chehida, Michel Auguin:
A SW/Configware Codesign Methodology for Control Dominated Applications. ASAP 2005: 56-64 - Sorin Cotofana, Alexandre Schmid, Yusuf Leblebici, Adrian M. Ionescu, Oliver Soffke, Peter Zipf, Manfred Glesner, Antonio Rubio:
CONAN - A Design Exploration Framework for Reliable Nano-Electronics. ASAP 2005: 260-267 - Alain Darte, Steven Derrien, Tanguy Risset:
Hardware/Software Interface for Multi-Dimensional Processor Arrays. ASAP 2005: 28-35 - Jérémie Detrey, Florent de Dinechin:
Table-based polynomials for fast hardware function evaluation. ASAP 2005: 328-333 - Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis:
Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained Reconfigurable Arrays. ASAP 2005: 161-168 - Hans Eberle, Arvinderpal Wander, Nils Gura, Sheueling Chang Shantz, Vipul Gupta:
Architectural Extensions for Elliptic Curve Cryptography over GF(2m) on 8-bit Microprocessors. ASAP 2005: 343-349 - Aristides Efthymiou, Jim D. Garside, Ioannis Papaefstathiou:
A Low-Power Processor Architecture Optimized forWireless Devices. ASAP 2005: 185-190 - Milos D. Ercegovac, Jean-Michel Muller:
Variable Radix Real and Complex Digit-Recurrence Division. ASAP 2005: 316-321 - Andreas Fidjeland, Wayne Luk:
Customising Application-Speci.c Multiprocessor Systems: a Case Study. ASAP 2005: 239-246 - A. Murat Fiskiran, Ruby B. Lee:
On-Chip Lookup Tables for Fast Symmetric-Key Encryption. ASAP 2005: 356-363 - Michael J. Flynn:
Area - Time - Power and Design effort: the basic tradeoffs in Application Specific Systems. ASAP 2005: 3 - Michael T. Frederick, Nathan A. VanderHorn, Arun K. Somani:
Real-time H/W Implementation of the Approximate Discrete Radon Transform. ASAP 2005: 399-404 - Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis:
Speedups from Partitioning Critical Software Parts to Coarse-Grain Reconfigurable Hardware. ASAP 2005: 50-59 - Jie Han, Erin Taylor, Jianbo Gao, José A. B. Fortes:
Faults, Error Bounds and Reliability of Nanoelectronic Circuits. ASAP 2005: 247-253 - M. Van Der Horst, Kees van Berkel, Johan Lukkien, Rudolf H. Mak:
Recursive Filtering on a Vector DSP with Linear Speedup. ASAP 2005: 379-386 - Tom R. Jacobs, José L. Núñez-Yáñez:
A Thread and Data-Parallel MPEG-4 Video Encoder for a System-On-Chip Multiprocessor. ASAP 2005: 405-410 - Björn Jäger, Jörg-Christian Niemann, Ulrich Rückert:
Analytical approach to massively parallel architectures for nanotechnologies. ASAP 2005: 268-275 - Amir Hosein Kamalizad, Nozar Tabrizi, Nader Bagherzadeh, Akira Hatanaka:
A Programmable DSP Architecture for Wireless Communication Systems. ASAP 2005: 231-238 - Nikolaos Kavvadias, Spiridon Nikolaidis:
Automated Instruction-Set Extension of Embedded Processors with Application to MPEG-4 Video Encoding. ASAP 2005: 140-145 - Peter M. Kelly, T. Martin McGinnity, Liam P. Maguire:
Reducing Interconnection Resource Overhead in Nano-scale FPGAs through MVL Signal Systems. ASAP 2005: 282-287 - Vida Kianzad, Shuvra S. Bhattacharyya, Gang Qu:
CASPER: An Integrated Energy-Driven Approach for Task Graph Scheduling on Distributed Embedded Systems. ASAP 2005: 191-197 - Ludovic L'Hours:
Generating Efficient Custom FPGA Soft-Cores for Control-Dominated Applications. ASAP 2005: 127-133
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