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18th DASIP 2025: Barcelona, Spain
- Jordane Lorandel
, Ahmed Kamaleldin
:
Design and Architecture for Signal and Image Processing - 18th International Workshop, DASIP 2025, Barcelona, Spain, January 20-22, 2025, Proceedings. Lecture Notes in Computer Science 15569, Springer 2025, ISBN 978-3-031-87896-1
Specialized Hardware Architecture for Efficient Processing
- Farhad EbrahimiAzandaryani, Dietmar Fey:
CSD-Driven Speedup in RISC-V Processor. 3-15 - Le Nam Hieu Nguyen
, Hana Krichene
:
Efficient FPGA Implementation of ViT Non-linear Functions. 16-27 - Konrad Lis
, Tomasz Kryjak
, Marek Gorgon
:
LiFT: Lightweight, FPGA-Tailored 3D Object Detection Based on LiDAR Data. 28-40
Efficient Processing using AI for Image, Vision and Signal Applications
- Agathe Archet, Nicolas Ventroux, Nicolas Gac, François Orieux:
A Practical HW-Aware NAS Flow for AI Vision Applications on Embedded Heterogeneous SoCs. 43-56 - Paola Busia
, Andrea Pinna
, Paolo Meloni
:
Endoscopy Image Classification for Wireless Capsules with CNNs on Microcontroller-Based Platforms. 57-68 - Saqib Nazir
, Reza Mohammadi Asiyabi
, Olivier Lezoray
:
Joint Underwater Depth Estimation and Dehazing from a Single Image Using Attention U-Net. 69-80 - Laura Meneghetti
, Edoardo Bianchi
, Nicola Demo
, Gianluigi Rozza
:
KD-AHOSVD: Neural Network Compression via Knowledge Distillation and Tensor Decomposition. 81-92
Analysis of Emerging Techniques for Signal Processing Applications
- Nikos Papageorgiou, Vassilis Paliouras
:
Novel Scheduling and Shifter Networks for 5G LDPC Decoders. 95-107 - Tianxu Li
, Mohamed El Bouazzati
, Camille Monière, Philippe A. Tanguy
, Guy Gogniat
:
Comparison Between In-Core Hardware IDS, Off-Core Hardware IDS and Software IDS. 108-120 - Naouel Haggui, Maxime Pelcat, Yaesop Lee, Shuvra S. Bhattacharyya, Kevin J. M. Martin, Jean-François Nezan:
Comparative Study of Memory Optimization Techniques for Dataflow-Modeled Applications. 121-132

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