default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDMicroelectronics Journal, Volume 53
Volume 53, July 2016
- Li Jiang, Ezz I. El-Masry, Ian G. Hill
:
Static and dynamic modeling of organic thin-film transistors for circuit design. 1-7 - Mahdi Hosseinnejad, Hossein Shamsi:
Fully differential charge-pump comparator-based pipelined ADC in 90 nm CMOS. 8-15 - Rupam Goswami, Brinda Bhowmick, Srimanta Baishya:
Effect of scaling on noise in Circular Gate TFET and its application as a digital inverter. 16-24 - Jae Woong Chun, C. Y. Roger Chen:
Transistor and pin reordering for leakage reduction in CMOS circuits. 25-34 - Devarshi Mrinal Das, Abhishek Srivastava, J. Ananthapadmanabhan, Meraj Ahmad, Maryam Shojaei Baghini:
A novel low-noise fully differential CMOS instrumentation amplifier with 1.88 noise efficiency factor for biomedical and sensor applications. 35-44 - Baljit Kaur, Arvind Kumar Sharma, Naushad Alam, S. K. Manhas, Bulusu Anand:
A variation aware timing model for a 2-input NAND gate and its use in sub-65 nm CMOS standard cell characterization. 45-55 - Ahmed S. H. Ahmed, Mohamed M. Aboudina, S. E.-D. Habib:
Offset calibration technique for capacitive transimpedance amplifier used in uncooled infrared detection. 56-64 - Sanjeev Kumar Sharma, Balwinder Raj, Mamta Khosla:
A Gaussian approach for analytical subthreshold current model of cylindrical nanowire FET with quantum mechanical effects. 65-72 - Joonsung Bae, Hoi-Jun Yoo:
The effects of electrode impedance on receiver sensitivity in body channel communication. 73-80 - Divya Duvvuri, Vijaya Sankara Rao Pasupureddi:
Design and analysis of a current mode integrated CTLE with charge mode adaptation. 81-89 - Dharmendra Kumar, Debasis Mitra:
Design of a practical fault-tolerant adder in QCA. 90-104 - Lawrence T. Clark, Vinay Vashishtha, Lucian Shifren, Aditya Gujja, Saurabh Sinha, Brian Cline, Chandarasekaran Ramamurthy, Greg Yeric:
ASAP7: A 7-nm finFET predictive process design kit. 105-115 - Ali Nikoofard, Siavash Kananian, Ehsan Hadizadeh, Ali Fotowat-Ahmady:
A fully analog side-band cancellation technique in radio-frequency transmitters. 116-126 - Enrique López-Morillo, Fernando Muñoz, Antonio Torralba, Juan Antonio Gómez Galán, Fernando J. Marquez, Ramón González Carvajal:
Power and area efficient continuous time ΣΔ modulator based on local feedback. 127-133 - Bhawna Aggarwal, Maneesha Gupta, Anil Kumar Gupta:
A comparative study of various current mirror configurations: Topologies and characteristics. 134-155 - Seyyed Ashkan Ebrahimi, Mohammad Reza Reshadinezhad, Ali Bohlooli, Mahyar Shahsavari:
Efficient CNTFET-based design of quaternary logic gates and arithmetic circuits. 156-166 - Daniel Johannesson, Muhammad Nawaz:
Analytical PSpice model for SiC MOSFET based high power modules. 167-176 - Konstantinos I. Papadimitriou, Alexandros Houssein, Emmanuel M. Drakakis:
Analytical study, performance optimisation and design rules for customary static and dynamic subthreshold MOS translinear topologies. 177-193
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2025-12-08 09:51 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
