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Vijay Khawshe

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2010 – 2019

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2010
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Kunal Desai, Rajasekhar Nagulapalli, Vijay Krishna, Rajkumar Palwai, Pravin Kumar Venkatesan, Vijay Khawshe:
High Speed Clock and Data Recovery Circuit with Novel Jitter Reduction Technique. VLSI Design 2010: 300-305

2000 – 2009

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2009
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Vijay Khawshe, Kapil Vyas, Renu Rangnekar, Prateek Goyal, Vijay Krishna, Kashinath Prabhu, Pravin Kumar Venkatesan, Leneesh Raghavan, Rajkumar Palwai, M. Thrivikraman, Kunal Desai, Abhijit Abhyankar:
A 2.4Gbps-4.8Gbps XDR-DRAM I/O (XIO) Link. VLSI Design 2009: 373-378
2007
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Vijay Khawshe, Pravin V. Kumar, Renu Rangnekar, Kapil Vyas, Kashi Prabu, Mahabaleshwara, Manish Jain, Navin K. Mishra, Abhijit Abhyankar:
A 2.5Gbps Quad CMOS Transceiver Cell Using Regulated Supply Low Jitter PLL. VLSI Design 2007: 141-145

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