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Sying-Jyan Wang

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Nan-Cheng Lai

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Publications

2013
[j14]
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  - electronic edition @ sinica.edu.tw (archived)
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  dblp key:
  - journals/jise/LaiW13
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  - https://dblp.org/rec/journals/jise/LaiW13
Nan-Cheng Lai, Sying-Jyan Wang:
Delay Test with Embedded Test Pattern Generator. J. Inf. Sci. Eng. 29(3): 545-556 (2013)
2008
[c23]
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  - conf/ats/LaiW08
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  - https://dblp.org/rec/conf/ats/LaiW08
Nan-Cheng Lai, Sying-Jyan Wang:
On-Chip Test Generation Mechanism for Scan-Based Two-Pattern Tests. ATS 2008: 251-256
2007
[c19]
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  - conf/ats/LaiW07
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  - https://dblp.org/rec/conf/ats/LaiW07
Nan-Cheng Lai, Sying-Jyan Wang:
Low-Capture-Power Test Generation by Specifying A Minimum Set of Controlling Inputs. ATS 2007: 413-418
2006
[j7]
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  - journals/tcad/LaiWF06
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Nan-Cheng Lai, Sying-Jyan Wang, Y.-H. Fu:
Low-Power BIST With a Smoother and Scan-Chain Reorder Under Optimal Cluster Size. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(11): 2586-2594 (2006)
2004
[c11]
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  - conf/ats/LaiWF04
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Nan-Cheng Lai, Sying-Jyan Wang, Yu-Hsuan Fu:
Low Power BIST with Smoother and Scan-Chain Reorder . Asian Test Symposium 2004: 40-45

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