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ORCIDMozammel H. A. Khan
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2020 – today
- 2024
[j16]Mozammel H. A. Khan:
STICA: Spanning-Tree-Based Identification of Clusters With Agglomeration for Numerical Data. IEEE Access 12: 150430-150450 (2024)
2010 – 2019
- 2018
- [j15]Mozammel H. A. Khan
, Jacqueline E. Rice:
First Steps in Creating Online Testable Reversible Sequential Circuits. VLSI Design 2018: 6153274:1-6153274:13 (2018) - 2017
- [j14]Mozammel H. A. Khan, Himanshu Thapliyal, Edgard Muñoz-Coreas:
Automatic synthesis of quaternary quantum circuits. J. Supercomput. 73(5): 1733-1759 (2017) - [c15]Md Asif Nashiry, Mozammel H. A. Khan, Jacqueline E. Rice:
Controlled and Uncontrolled SWAP Gates in Reversible Logic Synthesis. RC 2017: 141-147 - 2016
- [c14]Mozammel H. A. Khan, Jacqueline E. Rice:
Improved synthesis of reversible sequential circuits. ISCAS 2016: 2302-2305 - 2015
- [c13]Mozammel H. A. Khan:
Single-Electron Transistor Based Implementation of NOT, Feynman, and Toffoli Gates. ISMVL 2015: 66-71 - [c12]Mozammel H. A. Khan, Himanshu Thapliyal:
Reversible Logic Based Mapping of Quaternary Sequential Circuits Using QGFSOP Expression. ISVLSI 2015: 297-302 - 2014
- [j13]Mozammel H. A. Khan:
Design of Reversible Synchronous Sequential Circuits Using Pseudo Reed-Muller Expressions. IEEE Trans. Very Large Scale Integr. Syst. 22(11): 2278-2286 (2014) - 2011
- [c11]Mozammel H. A. Khan, Marek A. Perkowski:
Synthesis of Reversible Synchronous Counters. ISMVL 2011: 242-247 - 2010
- [j12]Mozammel H. A. Khan:
Multiple-case outlier detection in least-squares regression model using Quantum-inspired Evolutionary Algorithm. Int. J. Artif. Intell. Soft Comput. 2(3): 174-185 (2010) - [j11]Salena Akter, Mozammel H. A. Khan:
Multiple-Case Outlier Detection in Multiple Linear Regression Model Using Quantum-Inspired Evolutionary Algorithm. J. Comput. 5(12): 1779-1788 (2010)
2000 – 2009
- 2009
- [c10]Mozammel H. A. Khan:
Quantum Realization of Multiple-Valued Feynman and Toffoli Gates without Ancilla Input. ISMVL 2009: 103-108 - [c9]Mozammel H. A. Khan:
Scalable Architectures for Design of Reversible Quaternary Multiplexer and Demultiplexer Circuits. ISMVL 2009: 343-348 - 2008
- [j10]Mozammel H. A. Khan:
Cost Reduction in Nearest Neighbour Based Synthesis of Quantum Boolean Circuits. Eng. Lett. 16(1): 1-5 (2008) - [j9]Mozammel H. A. Khan:
Design of Reversible/Quantum Ternary Comparator Circuits. Eng. Lett. 16(2): 178-184 (2008) - [j8]Mozammel H. A. Khan:
Synthesis of quaternary reversible/quantum comparators. J. Syst. Archit. 54(10): 977-982 (2008) - [j7]Mozammel H. A. Khan:
A recursive method for synthesizing quantum/reversible quaternary parallel adder/subtractor with look-ahead carry. J. Syst. Archit. 54(12): 1113-1121 (2008) - [c8]Mozammel H. A. Khan, Nafisa K. Siddika, Marek A. Perkowski:
Minimization of Quaternary Galois Field Sum of Products Expression for Multi-Output Quaternary Logic Function Using Quaternary Galois Field Decision Diagram. ISMVL 2008: 125-130 - [c7]Mozammel H. A. Khan:
Reversible Realization of Quaternary Decoder, Multiplexer, and Demultiplexer Circuits. ISMVL 2008: 208-213 - 2007
- [j6]Mozammel H. A. Khan:
Reversible Realization of Quaternary Decoder, Multiplexer, and Demultiplexer Circuits. Eng. Lett. 15(2): 203-207 (2007) - [j5]Mozammel H. A. Khan, Marek A. Perkowski:
Quantum ternary parallel adder/subtractor with partially-look-ahead carry. J. Syst. Archit. 53(7): 453-464 (2007) - [j4]Mozammel H. A. Khan, Marek A. Perkowski:
GF(4) Based Synthesis of Quaternary Reversible/Quantum Logic Circuits. J. Multiple Valued Log. Soft Comput. 13(4-6): 583-604 (2007) - [c6]Mozammel H. A. Khan, Marek A. Perkowski:
GF(4) Based Synthesis of Quaternary Reversible/Quantum Logic Circuits. ISMVL 2007: 11 - [c5]Asif Islam Khan, Nadia Nusrat, Samira Manabi Khan, Masud Hasan, Mozammel H. A. Khan:
Quantum Realization of Some Ternary Circuits Using Muthukrishnan-Stroud Gates. ISMVL 2007: 20 - 2006
- [j3]Mozammel H. A. Khan:
Design of Reversible/Quantum Ternary Multiplexer and Demultiplexer. Eng. Lett. 13(2): 65-69 (2006) - [j2]Pawel Kerntopf, Marek A. Perkowski, Mozammel H. A. Khan:
On Universality of General Reversible Multiple-Valued Logic Gates. J. Multiple Valued Log. Soft Comput. 12(5-6): 417-429 (2006) - 2005
- [j1]Mozammel H. A. Khan, Marek A. Perkowski, Mujibur R. Khan, Pawel Kerntopf:
Terary GFSOP Minimization Using Kronecker Decision Diagrams and Their Synthesis with Quantum Cascades. J. Multiple Valued Log. Soft Comput. 11(5-6): 567-602 (2005) - 2004
- [c4]Mozammel H. A. Khan, Marek A. Perkowski:
Genetic algorithm based synthesis of multi-output ternary functions using quantum cascade of generalized ternary gates. IEEE Congress on Evolutionary Computation 2004: 2194-2201 - [c3]Mozammel H. A. Khan, Marek A. Perkowski, Mujibur R. Khan:
Ternary Galois Field Expansions for Reversible Logic and Kronecker Decision Diagrams for Ternary GFSOP Minimization. ISMVL 2004: 58-67 - [c2]Pawel Kerntopf, Marek A. Perkowski, Mozammel H. A. Khan:
On Universality of General Reversible Multiple-Valued Logic Gates. ISMVL 2004: 68-73 - 2003
- [c1]Mozammel H. A. Khan, Marek A. Perkowski, Pawel Kerntopf:
Multi-Output Galois Field Sum of Products Synthesis with New Quantum Cascades. ISMVL 2003: 146-153
Coauthor Index
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