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Books and Theses
- 1996
[b1]Michael Bolotski:
Abacus - a reconfigurable bit-parallel architecture for early vision. Massachusetts Institute of Technology, Cambridge, MA, USA, 1996
Journal Articles
- 2000
- [j2]William C. Athas, Nestoras Tzartzanis, Weihua Mao, Lena Peterson, Rajat Lal, Kisup Chong, Joong-Seok Moon, Lars J. Svensson, Michael Bolotski:
The design and implementation of a low-power clock-powered microprocessor. IEEE J. Solid State Circuits 35(11): 1561-1570 (2000) - 1993
- [j1]Michael Bolotski, Rod Barman, James J. Little, Daniel Camporese:
Silt: A distributed bit-parallel architecture for early vision. Int. J. Comput. Vis. 11(1): 63-74 (1993)
Conference and Workshop Papers
- 1998
- [c4]Michael Bolotski, Phillip Alvelda:
Low-power miniaturized information display systems. ISLPED 1998: 279-281 - 1995
- [c3]Michael Bolotski, Thomas Simon, Carlin Vieri, Rajeevan Amirtharajah
, Thomas F. Knight Jr.:
Abacus: a 1024 processor 8 ns SIMD array. ARVLSI 1995: 28-41 - 1990
- [c2]Rod Barman, Michael Bolotski, Daniel Camporese, James J. Little:
Silt: the bit-parallel approach. ICPR (2) 1990: 332-336 - 1989
- [c1]Michael Bolotski, Daniel Camporese, Rod Barman:
State assignment for multilevel logic using dynamic literal estimation. ICCAD 1989: 220-223
Coauthor Index
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