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ORCIDDavid Li 0002
Person information
- affiliation: Qualcomm, Inc., San Diego, CA, USA
- affiliation (PhD 2011): University of Waterloo, Department of Electrical and Computer Engineering, ON, Canada
Other persons with the same name
- David Li — disambiguation page
- David Li 0001
![[0000-0002-3187-6190]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png "0000-0002-3187-6190")
— University of Maryland, Department of Computer Science, MD, USA - David Li 0003 — Yeshiva University, Katz School of Science and Health, NY, USA
- David Li 0004 — IRA Labs Ltd (and 1 more)
- David Li 0005 — Columbia University, NY, USA
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2010 – 2019
- 2013
[j3]Pierce Chuang, David Li, Manoj Sachdev:
Constant Delay Logic Style. IEEE Trans. Very Large Scale Integr. Syst. 21(3): 554-565 (2013)- 2012
- [j2]Pierce Chuang, David Li, Manoj Sachdev:
A Low-Power High-Performance Single-Cycle Tree-Based 64-Bit Binary Comparator. IEEE Trans. Circuits Syst. II Express Briefs 59-II(2): 108-112 (2012) - [j1]David Rennie, David Li, Manoj Sachdev, Bharat L. Bhuva, Srikanth Jagannathan, Shi-Jie Wen, Richard Wong:
Performance, Metastability, and Soft-Error Robustness Trade-offs for Flip-Flops in 40 nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(8): 1626-1634 (2012) - [c6]Pierce Chuang, David Li, Manoj Sachdev, Vincent C. Gaudet:
A 148ps 135mW 64-bit adder with Constant-Delay logic in 65nm CMOS. CICC 2012: 1-4 - 2011
- [c5]David Rennie, David Li, Manoj Sachdev, Bharat L. Bhuva, Srikanth Jagannathan, Shi-Jie Wen, Rick Wong:
Performance, metastability and soft-error robustness tradeoffs for flip-flops in 40nm CMOS. CICC 2011: 1-4 - [c4]David Li, Pierce Chuang, David Nairn, Manoj Sachdev:
Design and analysis of metastable-hardened flip-flops in sub-threshold region. ISLPED 2011: 157-162 - [c3]David Li, David Rennie, Pierce Chuang, David Nairn, Manoj Sachdev:
Design and analysis of metastable-hardened and soft-error tolerant high-performance, low-power flip-flops. ISQED 2011: 583-590 - 2010
- [c2]David Li, Pierce Chuang, Manoj Sachdev:
Comparative analysis and study of metastability on high-performance flip-flops. ISQED 2010: 853-860
2000 – 2009
- 2009
- [c1]Pierce Chuang, David Li, Manoj Sachdev:
Design of a 64-bit Low-energy High-performance Adder using Dynamic Feedthrough Logic. ISCAS 2009: 3038-3041
Coauthor Index
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