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ORCIDJosef Weidendorfer
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- affiliation: Technical University Munich, Germany
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Books and Theses
- 2016
[b2]Josef Weidendorfer:
Simulation Driven Performance Analysis for Software Optimization (Simulationsunterstützte Leistungsanalyse von Programmen). Technical University of Munich, Germany, 2016- 2003
- [b1]Josef Weidendorfer:
Konzepte zur Optimierung der Skalierbarkeit von parallelen Fahrzeugkollisionsberechnungen und ihre industrielle Realisierbarkeit. Technical University Munich, Germany, Shaker 2003, ISBN 978-3-8322-1421-0, pp. 1-199
Journal Articles
- 2023
- [j4]Minh Thanh Chung
, Josef Weidendorfer, Karl Fürlinger, Dieter Kranzlmüller:
From reactive to proactive load balancing for task-based parallel applications in distributed memory machines. Concurr. Comput. Pract. Exp. 35(24) (2023) - 2011
- [j3]Tobias Klug, Michael Ott, Josef Weidendorfer, Carsten Trinitis:
autopin - Automated Optimization of Thread-to-Core Pinning on Multicore Systems. Trans. High Perform. Embed. Archit. Compil. 3: 219-235 (2011) - [j2]Carsten Trinitis, Tilman Küstner, Josef Weidendorfer, Jasmin Smajic:
Sparse matrix operations on several multi-core architectures. J. Supercomput. 57(2): 132-140 (2011) - 2008
- [j1]Josef Weidendorfer, Carsten Trinitis:
Off-loading application controlled data prefetching in numerical codes for multi-core processors. Int. J. Comput. Sci. Eng. 4(1): 22-28 (2008)
Conference and Workshop Papers
- 2024
- [c57]Jakob Schäffeler, Bengisu Elis, Amir Raoofy, Josef Weidendorfer, Martin Schulz:
A Portable Tool to Compare Performance Profiles from GPU Offloading Programming Models. CF 2024 - 2023
- [c56]Julian Scheipl, Amir Raoofy, Michael Ott, Josef Weidendorfer:
Phase-aware System-Side Sampling for HPC. CF 2023: 220-221 - 2022
- [c55]Amir Raoofy, Josef Weidendorfer, Michael Ott:
Always-on instrumentation for application introspection in HPC. CF 2022: 195-196 - [c54]Eishi Arima, Minjoon Kang, Issa Saba, Josef Weidendorfer, Carsten Trinitis, Martin Schulz:
Optimizing Hardware Resource Partitioning and Job Allocations on Modern GPUs under Power Caps. ICPP Workshops 2022: 9:1-9:10 - [c53]Sergej Breiter, Josef Weidendorfer, Minh Thanh Chung, Karl Fürlinger:
A Profiling-Based Approach to Cache Partitioning of Program Data. PDCAT 2022: 453-463 - [c52]Minh Thanh Chung, Josef Weidendorfer, Karl Fürlinger, Dieter Kranzlmüller:
Proactive Task Offloading for Load Balancing in Iterative Applications. PPAM (1) 2022: 263-275 - 2021
- [c51]Martin Schulz, Dieter Kranzlmüller, Laura Brandon Schulz, Carsten Trinitis, Josef Weidendorfer:
On the Inevitability of Integrated HPC Systems and How they will Change HPC System Operations. HEART 2021: 2:1-2:6 - 2020
- [c50]Minh Thanh Chung, Josef Weidendorfer, Philipp Samfass, Karl Fuerlinger, Dieter Kranzlmüller:
Scheduling across Multiple Applications using Task-Based Programming Models. IPDRM@SC 2020: 1-8 - 2019
- [c49]David Böhme, Kevin A. Huck, Jonathan Madsen, Josef Weidendorfer:
The Case for a Common Instrumentation Interface for HPC Codes. ProTools@SC 2019: 33-39 - 2018
- [c48]Minh Lê, Josef Weidendorfer:
A Message-Passing Based Algorithm for k-Terminal Reliability. EDCC 2018: 73-80 - [c47]Carsten Trinitis, Josef Weidendorfer:
Foreword by Editors / Workshop Description / TPC List. COSH@HiPEAC 2018: 5-8 - 2017
- [c46]Jens Breitbart, Simon Pickartz, Stefan Lankes, Josef Weidendorfer, Antonello Monti:
Dynamic Co-Scheduling Driven by Main Memory Bandwidth Utilization. CLUSTER 2017: 400-409 - [c45]Tilman Küstner, Carsten Trinitis, Josef Weidendorfer, Andreas Blaszczyk, Patrik Kaufmann, Marcus Johansson:
On the Applicability of Virtualization in an Industrial HPC Environment. COSH/VisorHPC@HiPEAC 2017: 33-38 - [c44]Alexis Engelke, Josef Weidendorfer:
Using LLVM for Optimized Lightweight Binary Re-Writing at Runtime. IPDPS Workshops 2017: 785-794 - [c43]Dai Yang, Josef Weidendorfer, Carsten Trinitis, Tilman Küstner, Sibylle Ziegler:
Enabling Application-Integrated Proactive Fault Tolerance. PARCO 2017: 475-484 - 2016
- [c42]Jens Breitbart, Simon Pickartz, Josef Weidendorfer, Antonello Monti:
Viability of Virtual Machines in HPC - A State of the Art Analysis. Euro-Par Workshops 2016: 721-733 - [c41]Carsten Trinitis, Josef Weidendorfer, André Brinkmann:
Co-Scheduling: Prospects and Challenges. COSH@HiPEAC (extended versions) 2016: 1-11 - [c40]Carsten Trinitis, Josef Weidendorfer:
Foreword / Workshop Description. COSH@HiPEAC 2016: 5-6 - [c39]Josef Weidendorfer, Jens Breitbart:
Detailed Characterization of HPC Applications for Co-Scheduling. COSH@HiPEAC 2016: 19-24 - [c38]Jens Breitbart, Josef Weidendorfer:
Detailed Application Characterization and Its Use for Effective Co-Scheduling. COSH@HiPEAC (extended versions) 2016: 69-94 - [c37]Josef Weidendorfer, Jens Breitbart:
Inclusive Cost Attribution for Cache Use Profiling. ICCS 2016: 1439-1449 - [c36]Josef Weidendorfer, Jens Breitbart:
The Case for Binary Rewriting at Runtime for Efficient Implementation of High-Level Programming Models in HPC. IPDPS Workshops 2016: 376-385 - [c35]Jens Breitbart, Josef Weidendorfer, Carsten Trinitis:
Automatic Co-scheduling Based on Main Memory Bandwidth Usage. JSSPP 2016: 141-157 - 2015
- [c34]Jens Breitbart, Josef Weidendorfer, Carsten Trinitis:
Case Study on Co-scheduling for HPC Applications. ICPP Workshops 2015: 277-285 - 2014
- [c33]Minh Lê, Josef Weidendorfer, Max Walter:
A Novel Variable Ordering Heuristic for BDD-based K-Terminal Reliability. DSN 2014: 527-537 - [c32]Minh Lê, Max Walter, Josef Weidendorfer:
Improving the Kuo-Lu-Yeh Algorithm for Assessing Two-Terminal Reliability. EDCC 2014: 13-22 - 2013
- [c31]Josef Weidendorfer:
Data Transfer Requirement Analysis with Bandwidth Curves. Euro-Par Workshops 2013: 607-616 - [c30]David Büttner, Jean-Thomas Acquaviva, Josef Weidendorfer:
Real Asynchronous MPI Communication in Hybrid Codes through OpenMP Communication Tasks. ICPADS 2013: 208-215 - [c29]Thomas Müller, Josef Weidendorfer, Andreas Blaszczyk:
Expression Tree Evaluation by Dynamic Code Generation - Are Accelerators Up for the Task? ICPP 2013: 230-239 - [c28]Josef Weidendorfer, Michael Bader:
ParCo 2013 PhD Symposium. PARCO 2013: 439-440 - 2012
- [c27]Alin Florindor Murarasu, Josef Weidendorfer:
Building Input Adaptive Parallel Applications: A Case Study of Sparse Grid Interpolation. CSE 2012: 1-8 - [c26]Anders Hast, Josef Weidendorfer, Jan-Philipp Weiss:
UCHPC 2012: Fifth Workshop on UnConventional High Performance Computing. Euro-Par Workshops 2012: 505-506 - [c25]Michael Gerndt, Frank Hannig, Andreas Herkersdorf, Andreas Hollmann, Marcel Meyer, Sascha Roloff, Josef Weidendorfer, Thomas Wild, Aurang Zaib:
An integrated simulation framework for invasive computing. FDL 2012: 209-216 - [c24]Michael Gerndt, Andreas Hollmann, Marcel Meyer, Martin Schreiber, Josef Weidendorfer:
Invasive computing with iOMP. FDL 2012: 225-231 - [c23]Minh Lê, Max Walter, Josef Weidendorfer:
A Memory-efficient Bounding Algorithm for the Two-terminal Reliability Problem. QMPD 2012: 15-25 - [c22]Alin Florindor Murarasu, Gerrit Buse, Dirk Pflüger, Josef Weidendorfer, Arndt Bode:
Fastsg: A Fast Routines Library for Sparse Grids. ICCS 2012: 354-363 - 2011
- [c21]Josef Weidendorfer, Tilman Küstner, Sally A. McKee:
Performance optimization by dynamic code transformation. Conf. Computing Frontiers 2011: 7 - [c20]Anders Hast, Josef Weidendorfer, Jan-Philipp Weiss:
UCHPC 2011: Fourth Workshop on UnConventional High Performance Computing. Euro-Par Workshops (2) 2011: 333-334 - [c19]Alin Florindor Murarasu, Josef Weidendorfer, Arndt Bode:
Workload Balancing on Heterogeneous Systems: A Case Study of Sparse Grid Interpolation. Euro-Par Workshops (2) 2011: 345-354 - [c18]Alin Florindor Murarasu, Josef Weidendorfer, Gerrit Buse, Daniel Butnaru, Dirk Pflüger:
Compact data structure and scalable algorithms for the sparse grid technique. PPoPP 2011: 25-34 - 2010
- [c17]Alexander Heinecke, Carsten Trinitis, Josef Weidendorfer:
Porting existing cache-oblivious linear algebra HPC modules to larrabee architecture. Conf. Computing Frontiers 2010: 91-92 - [c16]Anders Hast, Lars Bengtsson, Josef Weidendorfer, Ren Wu:
UCHPC 2010: Third Workshop on UnConventional High Performance Computing. Euro-Par Workshops 2010: 327-328 - [c15]Hans Hacker, Carsten Trinitis, Josef Weidendorfer, Matthias Brehm:
Considering GPGPU for HPC Centers: Is It Worth the Effort? Facing the Multicore-Challenge 2010: 118-130 - 2009
- [c14]Tilman Küstner, Josef Weidendorfer, Tobias Weinzierl:
Argument Controlled Profiling. Euro-Par Workshops 2009: 177-184 - [c13]Tilman Küstner, Josef Weidendorfer, Jasmine Schirmer, Tobias Klug, Carsten Trinitis, Sybille Ziegler:
Parallel MLEM on Multicore Architectures. ICCS (1) 2009: 491-500 - [c12]Michael Bader, Josef Weidendorfer:
Exploiting memory hierarchies in scientific computing. HPCS 2009: 33-35 - [c11]Carsten Trinitis, Tilman Küstner, Josef Weidendorfer, Jasmin Smajic:
Sparse Matrix Operations on Multi-core Architectures. PaCT 2009: 41-48 - 2008
- [c10]Josef Weidendorfer:
Sequential Performance Analysis with Callgrind and KCachegrind. Parallel Tools Workshop 2008: 93-113 - 2007
- [c9]Josef Weidendorfer, Michael Ott, Tobias Klug, Carsten Trinitis:
Latencies of Conflicting Writes on Contemporary Multicore Architectures. PaCT 2007: 318-327 - 2005
- [c8]Josef Weidendorfer, Carsten Trinitis:
Collecting and Exploiting Cache-Reuse Metrics. International Conference on Computational Science (2) 2005: 191-198 - [c7]Jie Tao, Jürgen Jeitner, Carsten Trinitis, Wolfgang Karl, Josef Weidendorfer:
Comprehensive Cache Inspection with Hardware Monitors. PaCT 2005: 331-345 - 2004
- [c6]Jie Tao, Josef Weidendorfer:
Cache Simulation Based on Runtime Instrumentation for OpenMP Applications. Annual Simulation Symposium 2004: 97-103 - [c5]Edmond Kereku, Tianchao Li, Michael Gerndt, Josef Weidendorfer:
A Data Structure Oriented Monitoring Environment for Fortran OpenMP Programs. Euro-Par 2004: 133-140 - [c4]Josef Weidendorfer, Markus Kowarschik, Carsten Trinitis:
A Tool Suite for Simulation Based Analysis of Memory Access Behavior. International Conference on Computational Science 2004: 440-447 - [c3]Josef Weidendorfer, Carsten Trinitis:
Cache Optimizations for Iterative Numerical Codes Aware of Hardware Prefetching. PARA 2004: 921-927 - 2001
- [c2]Josef Weidendorfer, Peter Luksch:
A Framework for Transparent Load Balancing in Parallel Numerical Simulation. Annual Simulation Symposium 2001: 125-132 - 1999
- [c1]Hermann Hellwagner, Josef Weidendorfer:
SCI Sockets Library. Scalable Coherent Interface 1999: 209-229
Editorship
- 2018
- [e12]Dora Blanco Heras, Luc Bougé, Gabriele Mencagli, Emmanuel Jeannot, Rizos Sakellariou, Rosa M. Badia, Jorge G. Barbosa, Laura Ricci, Stephen L. Scott, Stefan Lankes, Josef Weidendorfer:
Euro-Par 2017: Parallel Processing Workshops - Euro-Par 2017 International Workshops, Santiago de Compostela, Spain, August 28-29, 2017, Revised Selected Papers. Lecture Notes in Computer Science 10659, Springer 2018, ISBN 978-3-319-75177-1 [contents] - [e11]Carsten Trinitis, Josef Weidendorfer:
Proceedings of the 3rd Workshop on Co-Scheduling of HPC Applications, COSH@HiPEAC 2018, Manchester, United Kingdom, January 23, 2018. TUM Library 2018 [contents] - 2017
- [e10]Frédéric Desprez, Pierre-François Dutot, Christos Kaklamanis, Loris Marchal, Korbinian Molitorisz, Laura Ricci, Vittorio Scarano, Miguel A. Vega-Rodríguez, Ana Lucia Varbanescu, Sascha Hunold, Stephen L. Scott, Stefan Lankes, Josef Weidendorfer:
Euro-Par 2016: Parallel Processing Workshops - Euro-Par 2016 International Workshops, Grenoble, France, August 24-26, 2016, Revised Selected Papers. Lecture Notes in Computer Science 10104, Springer 2017, ISBN 978-3-319-58942-8 [contents] - [e9]Carsten Trinitis, Josef Weidendorfer:
Co-Scheduling of HPC Applications [extended versions of all papers from COSH@HiPEAC 2016, Prague, Czech Republic, January 19, 2016]. Advances in Parallel Computing 28, IOS Press 2017, ISBN 978-1-61499-729-0 [contents] - [e8]Carsten Clauss, Stefan Lankes, Carsten Trinitis, Josef Weidendorfer:
Proceedings of the Joined Workshops COSH 2017 and VisorHPC 2017, COSH/VisorHPC@HiPEAC 2017, Stockholm, Sweden, January 24, 2017. TUM Library 2017, ISBN 978-3-00-055564-0 [contents] - 2016
- [e7]Carsten Trinitis, Josef Weidendorfer:
Proceedings of the 1st COSH Workshop on Co-Scheduling of HPC Applications, COSH@HiPEAC 2016, Prague, Czech Republic, January 19, 2016. TUM Library 2016 [contents] - [e6]Jesús Carretero, Javier García Blas, Victor Gergel, Vladimir V. Voevodin, Iosif B. Meyerov, Juan A. Rico-Gallego, Juan Carlos Díaz Martín, Pedro Alonso, Juan José Durillo, José Daniel García Sánchez, Alexey L. Lastovetsky, Fabrizio Marozzo, Qin Liu, Md. Zakirul Alam Bhuiyan, Karl Fürlinger, Josef Weidendorfer, José Gracia:
Algorithms and Architectures for Parallel Processing - ICA3PP 2016 Collocated Workshops: SCDT, TAPEMS, BigTrust, UCER, DLMCS, Granada, Spain, December 14-16, 2016, Proceedings. Lecture Notes in Computer Science 10049, Springer 2016, ISBN 978-3-319-49955-0 [contents] - 2015
- [e5]Sascha Hunold, Alexandru Costan, Domingo Giménez, Alexandru Iosup, Laura Ricci, María Engracia Gómez Requena, Vittorio Scarano, Ana Lucia Varbanescu, Stephen L. Scott, Stefan Lankes, Josef Weidendorfer, Michael Alexander:
Euro-Par 2015: Parallel Processing Workshops - Euro-Par 2015 International Workshops, Vienna, Austria, August 24-25, 2015, Revised Selected Papers. Lecture Notes in Computer Science 9523, Springer 2015, ISBN 978-3-319-27307-5 [contents] - 2014
- [e4]Dieter an Mey, Michael Alexander, Paolo Bientinesi, Mario Cannataro, Carsten Clauss, Alexandru Costan, Gabor Kecskemeti, Christine Morin, Laura Ricci, Julio Sahuquillo, Martin Schulz, Vittorio Scarano, Stephen L. Scott, Josef Weidendorfer:
Euro-Par 2013: Parallel Processing Workshops - BigDataCloud, DIHC, FedICI, HeteroPar, HiBB, LSDVE, MHPC, OMHI, PADABS, PROPER, Resilience, ROME, and UCHPC 2013, Aachen, Germany, August 26-27, 2013. Revised Selected Papers. Lecture Notes in Computer Science 8374, Springer 2014, ISBN 978-3-642-54419-4 [contents] - 2013
- [e3]Ioannis Caragiannis, Michael Alexander, Rosa M. Badia, Mario Cannataro, Alexandru Costan, Marco Danelutto, Frédéric Desprez, Bettina Krammer, Julio Sahuquillo, Stephen L. Scott, Josef Weidendorfer:
Euro-Par 2012: Parallel Processing Workshops - BDMC, CGWS, HeteroPar, HiBB, OMHI, Paraphrase, PROPER, Resilience, UCHPC, VHPC, Rhodes Islands, Greece, August 27-31, 2012. Revised Selected Papers. Lecture Notes in Computer Science 7640, Springer 2013, ISBN 978-3-642-36948-3 [contents] - 2012
- [e2]Michael Alexander, Pasqua D'Ambra, Adam Belloum, George Bosilca, Mario Cannataro, Marco Danelutto, Beniamino Di Martino, Michael Gerndt, Emmanuel Jeannot, Raymond Namyst, Jean Roman, Stephen L. Scott, Jesper Larsson Träff, Geoffroy Vallée, Josef Weidendorfer:
Euro-Par 2011: Parallel Processing Workshops - CCPI, CGWS, HeteroPar, HiBB, HPCVirt, HPPC, HPSS, MDGS, ProPer, Resilience, UCHPC, VHPC, Bordeaux, France, August 29 - September 2, 2011, Revised Selected Papers, Part I. Lecture Notes in Computer Science 7155, Springer 2012, ISBN 978-3-642-29736-6 [contents] - [e1]Michael Alexander, Pasqua D'Ambra, Adam Belloum, George Bosilca, Mario Cannataro, Marco Danelutto, Beniamino Di Martino, Michael Gerndt, Emmanuel Jeannot, Raymond Namyst, Jean Roman, Stephen L. Scott, Jesper Larsson Träff, Geoffroy Vallée, Josef Weidendorfer:
Euro-Par 2011: Parallel Processing Workshops - CCPI, CGWS, HeteroPar, HiBB, HPCVirt, HPPC, HPSS, MDGS, ProPer, Resilience, UCHPC, VHPC, Bordeaux, France, August 29 - September 2, 2011, Revised Selected Papers, Part II. Lecture Notes in Computer Science 7156, Springer 2012, ISBN 978-3-642-29739-7 [contents]
Reference Works
- 2011
- [r1]Josef Weidendorfer:
Intel Core Microarchitecture, x86 Processor Family. Encyclopedia of Parallel Computing 2011: 936-944
Informal and Other Publications
- 2024
- [i1]Eishi Arima, Minjoon Kang, Issa Saba, Josef Weidendorfer, Carsten Trinitis, Martin Schulz:
Optimizing Hardware Resource Partitioning and Job Allocations on Modern GPUs under Power Caps. CoRR abs/2405.03838 (2024)
Coauthor Index
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