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Sebastian Meisner

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2020 – today

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2020
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Jahanzeb Anwer, Sebastian Meisner, Marco Platzner:
Dynamic Reliability Management for FPGA-Based Systems. Int. J. Reconfigurable Comput. 2020: 2808710:1-2808710:19 (2020)

2010 – 2019

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2016
[c6]
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Sebastian Meisner, Marco Platzner:
Thread shadowing: On the effectiveness of error detection at the hardware thread level. ReConFig 2016: 1-8
2015
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Sebastian Meisner, Marco Platzner:
Comparison of thread signatures for error detection in hybrid multi-cores. FPT 2015: 212-215
2014
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Sebastian Meisner, Marco Platzner:
Thread Shadowing: Using Dynamic Redundancy on Hybrid Multi-cores for Error Detection. ARC 2014: 283-290
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Jahanzeb Anwer, Marco Platzner, Sebastian Meisner:
FPGA Redundancy Configurations: An Automated Design Space Exploration. IPDPS Workshops 2014: 275-280
2013
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Tim Süß, Andrew Schoenrock, Sebastian Meisner, Christian Plessl:
Parallel Macro Pipelining on the Intel SCC Many-Core Computer. IPDPS Workshops 2013: 64-73
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Jahanzeb Anwer, Sebastian Meisner, Marco Platzner:
Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime. ReConFig 2013: 1-6

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