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Dietmar Sträußnigg

Dietmar Straeussnigg

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Journal Articles

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2010
[j2]
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  - journals/ei/PriewasserAMSH10
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  - https://dblp.org/rec/journals/ei/PriewasserAMSH10
Robert Priewasser, Matteo Agostinelli, Stefano Marsili, Dietmar Sträußnigg, Mario Huemer:
Comparative study of linear and non-linear integrated control schemes applied to a Buck converter for mobile applications. Elektrotech. Informationstechnik 127(4): 103-108 (2010)
2002
[j1]
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  - journals/jssc/WeinbergerWFHFS02
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Hubert Weinberger, Andreas Wiesbauer, Christian Fleischhacker, Joerg Hauptmann, Thomas Ferianz, Michael Staber, Dietmar Sträußnigg, Berthold Seger:
An ADSL-RT full-rate analog front end IC with integrated line driver. IEEE J. Solid State Circuits 37(7): 857-865 (2002)

Conference and Workshop Papers

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2024
[c13]
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  - conf/iscas/CeballosCRCSSWG24
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Jose Luis Ceballos, Fulvio Ciciotti, Christopher Rogi, Alessandro Caspani, Luca Sant, Dietmar Straeussnigg, Andreas Wiesbauer, Simon Gruenberger, Chin Yeong Koh, Chern Sia Phillip Lim:
A 70dBA-460μW Companding Digital Silicon Microphone with Programmable Acoustic Overload Point and MEMS Asymmetry Robustness. ISCAS 2024: 1-5
[c12]
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  - conf/iscas/ShenPSG24
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Yukai Shen, Carlos Perez, Dietmar Straeussnigg, Eric Gutierrez:
Time-Encoded Mostly Digital Feature Extraction for Voice Activity Detection Tasks. ISCAS 2024: 1-5
2023
[c11]
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  - conf/iscas/ShenSG23
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Yukai Shen, Dietmar Straeussnigg, Eric Gutierrez:
Towards Ultra-Low Power Consumption VAD Architectures with Mixed Signal Circuits. ISCAS 2023: 1-5
2022
[c10]
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  - conf/esscirc/CeballosRCBSW22
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Jose Luis Ceballos, Christopher Rogi, Fulvio Ciciotti, Cesare Buffa, Dietmar Straeussnigg, Andreas Wiesbauer:
A 69dBA-730µW Silicon Microphone System with Ultra & Infra-Sound Robustness. ESSCIRC 2022: 409-412
[c9]
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  - conf/iscas/VeraSM0P22
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Pablo Vera, Dietmar Straeussnigg, Victor Medina, Luis Hernández, Susana Patón:
Optimal reconfiguration instant in ΣΔ Modulators. ISCAS 2022: 1225-1229
2019
[c8]
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  - conf/iscas/VeraPS19
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Pablo Vera, Susana Patón, Dietmar Straeussnigg:
Idle Tones Reduction in Digital Single-Bit ΣΔ Modulators. ISCAS 2019: 1-5
2017
[c7]
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  - conf/isscc/BachGSBSSW17
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Elmar Bach, Richard Gaggl, Luca Sant, Cesare Buffa, Snezana Stojanovic, Dietmar Straeussnigg, Andreas Wiesbauer:
9.5 A 1.8V true-differential 140dB SPL full-scale standard CMOS MEMS digital microphone exhibiting 67dB SNR. ISSCC 2017: 166-167
2016
[c6]
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  - conf/icecsys/Conesa-Peraleja16
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Laura Conesa-Peraleja, Susana Patón, Dietmar Straeussnigg, Andreas Wiesbauer:
Signal boosting to extend the bandwidth of oversampled converters. ICECS 2016: 600-603
2015
[c5]
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  - conf/iscas/CardesJHWSG15
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Fernando Cardes, Ruzica Jevtic, Luis Hernández, Andreas Wiesbauer, Dietmar Sträußnigg, Richard Gaggl:
A MEMS microphone interface based on a CMOS LC oscillator and a digital sigma-delta modulator. ISCAS 2015: 2233-2236
[c4]
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  - conf/norchip/TorrenoPCHS15
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Juan A. Torreño, Susana Patón, Laura Conesa-Peraleja, Luis Hernández, Dietmar Straeussnigg:
A noise coupled ΣΔ architecture using a Non Uniform Quantizer. NORCAS 2015: 1-4
2014
[c3]
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  - conf/mwscas/CardesHEWSG14
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Fernando Cardes, Luis Hernández, Javier Escobar, Andreas Wiesbauer, Dietmar Straeussnigg, Richard Gaggl:
A time-encoding CMOS capacitive sensor readout circuit with flicker noise reduction. MWSCAS 2014: 390-393
2006
[c2]
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  - conf/eusipco/SchwingshacklS06
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David Schwingshackl, Dietmar Straeussnigg:
Correlated discrete disturbers cancelation in data communication systems. EUSIPCO 2006: 1-4
[c1]
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  - conf/iscas/WiesbauerSGCHG06
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Andreas Wiesbauer, Dietmar Sträußnigg, Richard Gaggl, Martin Clara, Luis Hernández, Daniel Gruber:
Clock jitter compensation for current steering DACs. ISCAS 2006

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