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2020 – today
- 2023
[c6]Leiou Wang, Donghui Wang:
A Model-Guided Underwater Image Enhancement Network. ASICON 2023: 1-4- 2020
- [j11]Leiou Wang
, Donghui Wang, Chengpeng Hao:
A Multiple-Measurement Vectors Reconstruction Method for Low SNR Scenarios. IEEE Trans. Circuits Syst. II Express Briefs 67-II(4): 785-789 (2020)
2010 – 2019
- 2019
- [j10]Yulin Zhao, Donghui Wang, Leiou Wang:
Convolution Accelerator Designs Using Fast Algorithms. Algorithms 12(5): 112 (2019) - [c5]Leiou Wang, Donghui Wang:
An Automatically Selective Signal Combining Algorithm and System for Low SNR ECG Signals. ASICON 2019: 1-4 - 2018
- [j9]Yanzhen Xing, Donghui Wang, Leiou Wang:
A Novel Dynamic Generalized Opposition-Based Grey Wolf Optimization Algorithm. Algorithms 11(4): 47 (2018) - [j8]Yulin Zhao, Donghui Wang, Leiou Wang, Peng Liu:
A Faster Algorithm for Reducing the Computational Complexity of Convolutional Neural Networks. Algorithms 11(10): 159 (2018) - [j7]Leiou Wang, Donghui Wang, Chengpeng Hao:
A Novel Failure Detection Circuit for SUMPLE Using Variability Index. IEICE Trans. Electron. 101-C(2): 139-142 (2018) - [j6]Leiou Wang, Donghui Wang, Chengpeng Hao:
A Signum Polarization Fast Eigen-Based Signal Combining Algorithm. IEEE Trans. Aerosp. Electron. Syst. 54(4): 2015-2024 (2018) - [c4]Leiou Wang, Donghui Wang, Chengpeng Hao:
A Fast Eigen-Based Signal Combining Algorithm by Using CORDIC. EUSIPCO 2018: 618-622 - 2017
- [j5]Leiou Wang, Donghui Wang, Chengpeng Hao:
Intelligent CFAR Detector Based on Support Vector Machine. IEEE Access 5: 26965-26972 (2017) - [j4]Leiou Wang, Donghui Wang, Feiyang Zheng, Chengpeng Hao:
An Iteration-Based Variable Step-Size Algorithm for Joint Explicit Adaptation of Time Delay. IEEE Trans. Circuits Syst. II Express Briefs 64-II(8): 992-996 (2017) - [c3]Leiou Wang, Donghui Wang:
A gain factor controlled SUMPLE algorithm and system. ASICON 2017: 183-186 - 2016
- [j3]Diancheng Wu, Jiarui Li, Leiou Wang, Donghui Wang, Chengpeng Hao:
A Novel Dictionary-Based Method for Test Data Compression Using Heuristic Algorithm. IEICE Trans. Electron. 99-C(6): 730-733 (2016) - 2015
- [c2]Siliang Hua, Donghui Wang, Leiou Wang, Yan Liu, Jiarui Li:
A PVT-insensitive all digital CMOS time-to-digital converter based on looped delay-line with extension scheme. ASICON 2015: 1-4 - 2014
- [j2]Leiou Wang, Donghui Wang, Chengpeng Hao:
Low power address bus encoding using loop prediction. IEICE Electron. Express 11(12): 20140379 (2014) - [j1]Leiou Wang, Donghui Wang, Huan Ying, Chengpeng Hao:
Low power register files by eliminating redundant read. IEICE Electron. Express 11(18): 20140774 (2014) - 2013
- [c1]Leiou Wang:
A new fast median filtering algorithm based on FPGA. ASICON 2013: 1-4
Coauthor Index
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