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Hui Wu 0007
Person information
- affiliation: University of Rochester, Rochester, NY, USA
Other persons with the same name
- Hui Wu — disambiguation page
- Hui Wu 0001 — University of New South Wales, Sydney, Australia
- Hui Wu 0002 — Tsinghua University, Beijing, China
- Hui Wu 0003 — Xi'an Jiaotong University, Xi'an, China
- Hui Wu 0004 — hanghai Lixin University of Accounting and Finance, Shanghai, China
- Hui Wu 0005 — Peking University, Beijing, China
- Hui Wu 0006 — University of North Carolina, Charlotte, NC, USA
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2020 – today
- 2023
- [c13]Uday Kumar Reddy Vengalam, Yongchao Liu, Tong Geng, Hui Wu, Michael C. Huang:
Supporting Energy-based Learning with an Ising Machine substrate: a Case Study on RBM. MICRO 2023: 465-478 - [i2]Uday Kumar Reddy Vengalam, Yongchao Liu, Tong Geng, Hui Wu, Michael C. Huang:
Supporting Energy-Based Learning With An Ising Machine Substrate: A Case Study on RBM. CoRR abs/2304.02525 (2023) - [i1]Uday Kumar Reddy Vengalam, Andrew Hahn, Yongchao Liu, Anshujit Sharma, Hui Wu, Michael C. Huang:
Efficient LDPC Decoding using Physical Computation. CoRR abs/2312.02161 (2023)
2010 – 2019
- 2019
- [c12]Richard Afoakwa, Lejie Lu, Hui Wu, Michael C. Huang:
To Stack or Not To Stack. PACT 2019: 110-123 - [c11]Lejie Lu, Richard Afoakwa, Michael C. Huang, Hui Wu:
Concurrent Multipoint-to-Multipoint Communication on Interposer Channels. ISLPED 2019: 1-6 - 2018
- [c10]Richard Afoakwa, Lejie Lu, Yong Wang, Hui Wu, Michael C. Huang:
High Swing Pulse-Amplitude Modulation of Transmission Line Links for On-Chip Communication. ISCAS 2018: 1-5 - [c9]Lejie Lu, Yong Wang, Hui Wu:
An Energy-Efficient High-Swing PAM-4 Voltage-Mode Transmitter. ISLPED 2018: 9:1-9:6 - 2017
- [c8]Yong Wang, Hui Wu:
Design high bandwidth-density, low latency and energy efficient on-chip interconnect. ISLPED 2017: 1-6 - 2016
- [j4]Ioannis Savidis, Berkehan Ciftcioglu, Jie Xu, Jianyun Hu, Manish Jain, Rebecca Berman, Jing Xue, Peng Liu, Duncan Moore, Gary Wicks, Michael C. Huang, Hui Wu, Eby G. Friedman:
Heterogeneous 3-D circuits: Integrating free-space optics with CMOS. Microelectron. J. 50: 66-75 (2016) - 2015
- [c7]Yong Wang, Hui Wu:
A K-band pulse radar transceiver with highly digital closed-loop time-of-flight measurement. A-SSCC 2015: 1-4 - 2012
- [j3]Aaron Carpenter, Jianyun Hu, Jie Xu, Michael C. Huang, Hui Wu, Peng Liu:
Using Transmission Lines for Global On-Chip Communication. IEEE J. Emerg. Sel. Topics Circuits Syst. 2(2): 183-193 (2012) - [c6]Aaron Carpenter, Jianyun Hu, Övünç Kocabas, Michael C. Huang, Hui Wu:
Enhancing effective throughput for transmission line-based bus. ISCA 2012: 165-176 - 2011
- [c5]Aaron Carpenter, Jianyun Hu, Jie Xu, Michael C. Huang, Hui Wu:
A case for globally shared-medium on-chip interconnect. ISCA 2011: 271-282 - [c4]Aaron Carpenter, Jianyun Hu, Michael C. Huang, Hui Wu, Peng Liu:
A design space exploration of transmission-line links for on-chip interconnect. ISLPED 2011: 265-270 - 2010
- [c3]Jing Xue, Alok Garg, Berkehan Ciftcioglu, Jianyun Hu, Shang Wang, Ioannis Savidis, Manish Jain, Rebecca Berman, Peng Liu, Michael C. Huang, Hui Wu, Eby G. Friedman, Gary Wicks, Duncan Moore:
An intra-chip free-space optical interconnect. ISCA 2010: 94-105
2000 – 2009
- 2009
- [j2]Yunliang Zhu, Jonathan D. Zuegel, John R. Marciante, Hui Wu:
Distributed Waveform Generator: A New Circuit Technique for Ultra-Wideband Pulse Generation, Shaping and Modulation. IEEE J. Solid State Circuits 44(3): 808-823 (2009) - 2008
- [j1]Lin Zhang, Aaron Carpenter, Berkehan Ciftcioglu, Alok Garg, Michael C. Huang, Hui Wu:
Injection-Locked Clocking: A Low-Power Clock Distribution Scheme for High-Performance Microprocessors. IEEE Trans. Very Large Scale Integr. Syst. 16(9): 1251-1256 (2008) - 2006
- [c2]Lin Zhang, Berkehan Ciftcioglu, Michael C. Huang, Hui Wu:
Injection-Locked Clocking: A New GHz Clock Distribution Scheme. CICC 2006: 785-788 - [c1]Yunliang Zhu, Jonathan D. Zuegel, John R. Marciante, Hui Wu:
A reconfigurable, multi-gigahertz pulse shaping circuit based on distributed transversal filters. ISCAS 2006
Coauthor Index
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