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Journal Articles
- 2024
[j7]Aoyang Zhang
, Daniel Krüger, Behdad Aghelnejad, Guang Yang, Henry Hinton, Yi-Qiao Song, Donhee Ham:
A Portable Wideband CMOS NMR Spectrometer for Multinuclear Molecular Fingerprinting. IEEE J. Solid State Circuits 59(10): 3468-3478 (2024)- 2023
- [j6]Daniel Krüger, Aoyang Zhang, Behdad Aghelnejad, Henry Hinton, Victor Marrugat Arnal, Yi-Qiao Song, Yiqiao Tang, Ka-Meng Lei, Jens Anders, Donhee Ham:
A Portable CMOS-Based Spin Resonance System for High-Resolution Spectroscopy and Imaging. IEEE J. Solid State Circuits 58(7): 1838-1849 (2023) - [j5]Qing Li, Ying Chen, Aoyang Zhang, Yong Jiang, Longhao Zou, Zhimin Xu, Gabriel-Miro Muntean:
A Super-Resolution Flexible Video Coding Solution for Improving Live Streaming Quality. IEEE Trans. Multim. 25: 6341-6355 (2023) - 2021
- [j4]Aoyang Zhang, Qing Li, Ying Chen, Xiaoteng Ma, Longhao Zou, Yong Jiang, Zhimin Xu, Gabriel-Miro Muntean:
Video Super-Resolution and Caching - An Edge-Assisted Adaptive Video Streaming Solution. IEEE Trans. Broadcast. 67(4): 799-812 (2021) - 2019
- [j3]Aoyang Zhang, Mike Shuo-Wei Chen:
A Subharmonic Switching Digital Power Amplifier for Power Back-Off Efficiency Enhancement. IEEE J. Solid State Circuits 54(4): 1017-1028 (2019) - [j2]Aoyang Zhang, Mike Shuo-Wei Chen:
A Watt-Level Phase-Interleaved Multi-Subharmonic Switching Digital Power Amplifier. IEEE J. Solid State Circuits 54(12): 3452-3465 (2019) - 2018
- [j1]Jae-Won Nam, Mohsen Hassanpourghadi, Aoyang Zhang, Mike Shuo-Wei Chen:
A 12-Bit 1.6, 3.2, and 6.4 GS/s 4-b/Cycle Time-Interleaved SAR ADC With Dual Reference Shifting and Interpolation. IEEE J. Solid State Circuits 53(6): 1765-1779 (2018)
Conference and Workshop Papers
- 2024
- [c11]Yihong Zhu, Wenping Zhu, Yi Ouyang, Junwen Sun, Min Zhu, Qi Zhao, Jinjiang Yang, Chen Chen, Qichao Tao, Guang Yang, Aoyang Zhang, Shaojun Wei, Leibo Liu:
16.2 A 28nm 69.4kOPS 4.4μJ/Op Versatile Post-Quantum Crypto-Processor Across Multiple Mathematical Problems. ISSCC 2024: 298-300 - 2023
- [c10]Shisong Tang, Qing Li, Dingmin Wang, Ci Gao, Wentao Xiao, Dan Zhao, Yong Jiang, Qian Ma, Aoyang Zhang:
Counterfactual Video Recommendation for Duration Debiasing. KDD 2023: 4894-4903 - [c9]Aoyang Zhang, Daniel Krüger, Behdad Aghelnejad, Guang Yang, Henry Hinton, Yi-Qiao Song, Donhee Ham:
A Wideband CMOS NMR Spectrometer for Multinuclear Molecular Fingerprinting. VLSI Technology and Circuits 2023: 1-2 - 2022
- [c8]Daniel Krüger, Aoyang Zhang, Henry Hinton, Victor Marrugat Arnal, Yi-Qiao Song, Yiqiao Tang, Ka-Meng Lei, Jens Anders, Donhee Ham:
A Portable CMOS-based MRI System with 67×67×83 µm3Image Resolution. ESSCIRC 2022: 225-228 - [c7]Shisong Tang, Qing Li, Xiaoteng Ma, Ci Gao, Dingmin Wang, Yong Jiang, Qian Ma, Aoyang Zhang, Hechang Chen:
Knowledge-based Temporal Fusion Network for Interpretable Online Video Popularity Prediction. WWW 2022: 2879-2887 - 2021
- [c6]Aoyang Zhang, Mostafa M. Ayesh, Soumya Mahapatra, Mike Shuo-Wei Chen:
A 24-28 GHz Concurrent Harmonic and Subharmonic Tuning Class E/F2, 2/3 Subharmonic Switching Power Amplifier Achieving Peak/PBO Efficiency Enhancement. CICC 2021: 1-2 - [c5]Aoyang Zhang, Ce Yang, Mostafa M. Ayesh, Mike Shuo-Wei Chen:
26.6 A 5-to-6GHz Current-Mode Subharmonic Switching Digital Power Amplifier for Enhancing Power Back-Off Efficiency. ISSCC 2021: 364-366 - [c4]Ying Chen, Qing Li, Aoyang Zhang, Longhao Zou, Yong Jiang, Zhimin Xu, Junlin Li, Zhenhui Yuan:
Higher quality live streaming under lower uplink bandwidth: an approach of super-resolution based video coding. NOSSDAV 2021: 74-81 - 2019
- [c3]Aoyang Zhang, Mike Shuo-Wei Chen:
A Watt-Level Phase-Interleaved Multi-Subharmonic Switching Digital Power Amplifier Achieving 31.4% Average Drain Efficiency. ISSCC 2019: 74-76 - 2018
- [c2]Aoyang Zhang, Mike Shuo-Wei Chen:
A Sub-Harmonic Switching Digital Power Amplifier with Hybrid Class-G Operation for Enhancing Power Back-off Efficiency. VLSI Circuits 2018: 213-214 - 2016
- [c1]Jae-Won Nam, Mohsen Hassanpourghadi, Aoyang Zhang, Mike Shuo-Wei Chen:
A 12-bit 1.6 GS/s interleaved SAR ADC with dual reference shifting and interpolation achieving 17.8 fJ/conv-step in 65nm CMOS. VLSI Circuits 2016: 1-2
Coauthor Index
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