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Xijie Jia
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2020 – today
- 2024
- [j2]Xijie Jia, Yu Zhang, Guangdong Liu, Xinlin Yang, Tianyu Zhang, Jia Zheng, Dongdong Xu, Zhuohuan Liu, Mengke Liu, Xiaoyang Yan, Hong Wang, Rongzhang Zheng, Li Wang, Dong Li, Satyaprakash Pareek, Jian Weng, Lu Tian, Dongliang Xie, Hong Luo, Yi Shan:
XVDPU: A High-Performance CNN Accelerator on the Versal Platform Powered by the AI Engine. ACM Trans. Reconfigurable Technol. Syst. 17(2): 20:1-20:24 (2024) - 2022
- [c7]Xijie Jia, Yu Zhang, Guangdong Liu, Xinlin Yang, Tianyu Zhang, Jia Zheng, Dongdong Xu, Hong Wang, Rongzhang Zheng, Satyaprakash Pareek, Lu Tian, Dongliang Xie, Hong Luo, Yi Shan:
XVDPU: A High Performance CNN Accelerator on the Versal Platform Powered by the AI Engine. FPL 2022: 1-9 - [c6]Tianyu Zhang, Dong Li, Hong Wang, Yunzhi Li, Xiang Ma, Wei Luo, Yu Wang, Yang Huang, Yi Li, Yu Zhang, Xinlin Yang, Xijie Jia, Qiang Lin, Lu Tian, Fan Jiang, Dongliang Xie, Hong Luo, Yi Shan:
A-U3D: A Unified 2D/3D CNN Accelerator on the Versal Platform for Disparity Estimation. FPL 2022: 123-129 - 2020
- [j1]Yu Xing, Shuang Liang, Lingzhi Sui, Xijie Jia, Jiantao Qiu, Xin Liu, Yushun Wang, Yi Shan, Yu Wang:
DNNVM: End-to-End Compiler Leveraging Heterogeneous Optimizations on FPGA-Based CNN Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2668-2681 (2020) - [c5]Tianyu Zhang, Tiantian Han, Lu Tian, Yi Li, Xijie Jia, Guangdong Liu, Pingbo An, Yingran Tan, Lingzhi Sui, Shaoxia Fang, Dongliang Xie, Michaela Blott, Yi Shan:
LPAC: A Low-Precision Accelerator for CNN on FPGAs. FPGA 2020: 316
2010 – 2019
- 2019
- [c4]Jinzhang Peng, Lu Tian, Xijie Jia, Haotian Guo, Yongsheng Xu, Dongliang Xie, Hong Luo, Yi Shan, Yu Wang:
Multi-task ADAS system on FPGA. AICAS 2019: 171-174 - [c3]Yu Xing, Shuang Liang, Lingzhi Sui, Zhen Zhang, Jiantao Qiu, Xijie Jia, Xin Liu, Yushun Wang, Yi Shan, Yu Wang:
DNNVM: End-to-End Compiler Leveraging Operation Fusion on FPGA-based CNN Accelerators. FPGA 2019: 187-188 - [c2]Di Wu, Yu Zhang, Xijie Jia, Lu Tian, Tianping Li, Lingzhi Sui, Dongliang Xie, Yi Shan:
A High-Performance CNN Processor Based on FPGA for MobileNets. FPL 2019: 136-143 - [i1]Yu Xing, Shuang Liang, Lingzhi Sui, Xijie Jia, Jiantao Qiu, Xin Liu, Yushun Wang, Yu Wang, Yi Shan:
DNNVM : End-to-End Compiler Leveraging Heterogeneous Optimizations on FPGA-based CNN Accelerators. CoRR abs/1902.07463 (2019) - 2016
- [c1]Xijie Jia, Kaiyuan Guo, Wenqiang Wang, Yu Wang, Huazhong Yang:
SRI-SURF: A better SURF powered by scaled-RAM interpolator on FPGA. FPL 2016: 1-8
Coauthor Index
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last updated on 2024-08-14 22:10 CEST by the dblp team
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