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Ajeya Naithani
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2020 – today
- 2024
- [j6]Ajeya Naithani, Jaime Roelandts, Sam Ainsworth, Timothy M. Jones, Lieven Eeckhout:
Decoupled Vector Runahead for Prefetching Nested Memory-Access Chains. IEEE Micro 44(4): 20-26 (2024) - 2023
- [c6]Ajeya Naithani, Jaime Roelandts, Sam Ainsworth, Timothy M. Jones, Lieven Eeckhout:
Decoupled Vector Runahead. MICRO 2023: 17-31 - 2022
- [j5]Ajeya Naithani, Sam Ainsworth, Timothy M. Jones, Lieven Eeckhout:
Vector Runahead for Indirect Memory Accesses. IEEE Micro 42(4): 116-123 (2022) - [j4]Kartik Lakshminarasimhan, Ajeya Naithani, Josué Feliu, Lieven Eeckhout:
The Forward Slice Core: A High-Performance, Yet Low-Complexity Microarchitecture. ACM Trans. Archit. Code Optim. 19(2): 17:1-17:25 (2022) - [j3]Josué Feliu, Ajeya Naithani, Julio Sahuquillo, Salvador Petit, Moinuddin K. Qureshi, Lieven Eeckhout:
VMT: Virtualized Multi-Threading for Accelerating Graph Workloads on Commodity Processors. IEEE Trans. Computers 71(6): 1386-1398 (2022) - [c5]Ajeya Naithani, Lieven Eeckhout:
Reliability-Aware Runahead. HPCA 2022: 772-785 - 2021
- [c4]Ajeya Naithani, Sam Ainsworth, Timothy M. Jones, Lieven Eeckhout:
Vector Runahead. ISCA 2021: 195-208 - 2020
- [c3]Kartik Lakshminarasimhan, Ajeya Naithani, Josué Feliu, Lieven Eeckhout:
The Forward Slice Core Microarchitecture. PACT 2020: 361-372 - [c2]Ajeya Naithani, Josué Feliu, Almutaz Adileh, Lieven Eeckhout:
Precise Runahead Execution. HPCA 2020: 397-410
2010 – 2019
- 2019
- [j2]Ajeya Naithani, Josué Feliu, Almutaz Adileh, Lieven Eeckhout:
Precise Runahead Execution. IEEE Comput. Archit. Lett. 18(1): 71-74 (2019) - 2018
- [j1]Ajeya Naithani, Stijn Eyerman, Lieven Eeckhout:
Optimizing Soft Error Reliability Through Scheduling on Heterogeneous Multicore Processors. IEEE Trans. Computers 67(6): 830-846 (2018) - 2017
- [c1]Ajeya Naithani, Stijn Eyerman, Lieven Eeckhout:
Reliability-Aware Scheduling on Heterogeneous Multicore Processors. HPCA 2017: 397-408
Coauthor Index
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last updated on 2024-09-10 01:14 CEST by the dblp team
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