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ORCIDWei He 0015
Person information
- affiliation: China Telecom BestPay Coompany Ltd., Shanghai, China
- affiliation (PhD 2014): Technical University of Madrid, Spain
Other persons with the same name
- Wei He (aka: He Wei) — disambiguation page
- Wei He 0001
![[0000-0002-8944-9861]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png "0000-0002-8944-9861")
— University of Science and Technology Beijing, School of Automation and Electrical Engineering, China (and 2 more) - Wei He 0002 — University of Waterloo, Department of Electrical and Computer Engineering, ON, Canada
- Wei He 0003 — RIKEN Center for Advanced Intelligence Project, Tokyo, Japan (and 1 more)
- Wei He 0004 — Chinese University of Hong Kong, Department of Economics, Hong Kong
- Wei He 0005 — Macquarie University, Department of Cognitive Science, Sydney, NSW, Australia
- Wei He 0006 — Hong Kong Polytechnic University, Faculty of Business, Department of Management and Marketing, Hong Kong
- Wei He 0007 — Guang Dong University of Technology, School of Information Engineering, Guangzhou, China (and 1 more)
- Wei He 0008 — Harbin University of Science and Technology, Harbin University of Science and Technology, China
- Wei He 0009 — Chinese Academy of Sciences, Shanghai Institute of Microsystem of Information Technology, China
- Wei He 0010 — Huaihua College, College of Music and Dancing, China (and 2 more)
- Wei He 0011 — Hefei University of Technology, School of Electrical Engineering and Automation, China
- Wei He 0012 — University of Maryland, College Park, MD, USA
- Wei He 0013 — Chongqing University, Chongqing, China
- Wei He 0014 — Baidu Inc., Beijing, China (and 1 more)
- Wei He 0016 — Changchun University of Science and Technology, China
- Wei He 0017 — Guangxi Normal University, Guilin, China
- Wei (Joy) He (aka: Wei He 0018) — Texas Tech University, Rawls College of Business, Lubbock, TX, USA (and 2 more)
- Wei He 0019 — Nanjing University of Information Science and Technology, School of Automation, China
- Wei He 0020 — Shandong University, Joint SDU-NTU Centre for Artificial Intelligence Research, C-FAIR, Software School, China
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2020 – today
- 2022
[j8]Zixiao Wang, Biyao Che, Liang Guo, Yang Du, Ying Chen, Jizhuang Zhao, Wei He:
PipeFL: Hardware/Software co-Design of an FPGA Accelerator for Federated Learning. IEEE Access 10: 98649-98661 (2022)- 2021
- [j7]Guorui Xu, Fan Zhang, Bolin Yang, Xinjie Zhao, Wei He, Kui Ren:
Pushing the Limit of PFA: Enhanced Persistent Fault Analysis on Block Ciphers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(6): 1102-1116 (2021) - 2020
- [j6]Fan Zhang, Bolin Yang, Xiaofei Dong, Sylvain Guilley, Zhe Liu, Wei He, Fangguo Zhang, Kui Ren:
Side-Channel Analysis and Countermeasure Design on ARM-Based Quantum-Resistant SIKE. IEEE Trans. Computers 69(11): 1681-1693 (2020)
2010 – 2019
- 2018
- [j5]Debapriya Basu Roy, Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Wei He, Debdeep Mukhopadhyay, Zakaria Najm, Xuan Thuy Ngo:
The Conflicted Usage of RLUTs for Security-Critical Applications on FPGA. J. Hardw. Syst. Secur. 2(2): 162-178 (2018) - [j4]Fan Zhang, Xiaoxuan Lou, Xinjie Zhao, Shivam Bhasin, Wei He, Ruyi Ding, Samiya Qureshi, Kui Ren:
Persistent Fault Analysis on Block Ciphers. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2018(3): 150-172 (2018) - 2017
- [j3]Liang Geng, Fan Zhang, Jizhong Shen, Wei He, Shivam Bhasin, Xinjie Zhao, Shize Guo:
Transistor level SCA-resistant scheme based on fluctuating power logic. Sci. China Inf. Sci. 60(10): 109401:1-109401:3 (2017) - 2016
- [c7]Wei He, Jakub Breier, Shivam Bhasin, Noriyuki Miura, Makoto Nagata:
Ring Oscillator under Laser: Potential of PLL-based Countermeasure against Laser Fault Injection. FDTC 2016: 102-113 - [c6]Wei He, Jakub Breier, Shivam Bhasin:
Cheap and Cheerful: A Low-Cost Digital Sensor for Detecting Laser Fault Injection Attacks. SPACE 2016: 27-46 - [c5]Wei He, Jakub Breier, Shivam Bhasin, Dirmanto Jap, Hock Guan Ong, Chee Lip Gan:
Comprehensive Laser Sensitivity Profiling and Data Register Bit-Flips for Cryptographic Fault Attacks in 65 Nm FPGA. SPACE 2016: 47-65 - 2015
- [j2]Wei He, Shivam Bhasin, Andrés Otero, Tarik Graba, Eduardo de la Torre, Jean-Luc Danger:
Sophisticated security verification on routing repaired balanced cell-based dual-rail logic against side channel analysis. IET Inf. Secur. 9(1): 1-13 (2015) - [c4]Wei He, Dirmanto Jap, Alexander Herrmann:
Process Variation Evaluation Using RO PUF for Enhancing SCA-Resistant Dual-Rail Implementation. WISA 2015: 16-27 - 2014
- [j1]Wei He, Andrés Otero, Eduardo de la Torre, Teresa Riesgo:
Customized and automated routing repair toolset towards side-channel analysis resistant dual rail logic. Microprocess. Microsystems 38(8): 899-910 (2014) - 2012
- [c3]Wei He, Eduardo de la Torre, Teresa Riesgo:
An Interleaved EPE-Immune PA-DPL Structure for Resisting Concentrated EM Side Channel Attacks on FPGA Implementation. COSADE 2012: 39-53 - [c2]Wei He, Andrés Otero, Eduardo de la Torre, Teresa Riesgo:
Automatic generation of identical routing pairs for FPGA implemented DPL logic. ReConFig 2012: 1-6 - 2011
- [c1]Wei He, Eduardo de la Torre, Teresa Riesgo:
A Precharge-Absorbed DPL Logic for Reducing Early Propagation Effects on FPGA Implementations. ReConFig 2011: 217-222
Coauthor Index
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last updated on 2024-07-20 20:33 CEST by the dblp team
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