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Tsutomu Murakawa
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2020 – today
- 2024
- [c3]Hiraki Inoue, Takeya Hirose, Toshiki Mizuguchi, Yusuke Komura, Toshihiko Saito, Minato Ito, Kiyotaka Kimura, Tatsuya Onuki, Yoshinori Ando, Hiromi Sawai, Tsutomu Murakawa, Hitoshi Kunitake, Takanori Matsuzaki, Hajime Kimura, Makoto Ikeda, Shunpei Yamazaki:
Heterogeneous Oxide Semiconductor FETs Comprising Planar FET and Vertical Channel FETs Monolithically Stacked on Si CMOS, Enabling 1-Mbit 3D DRAM. IMW 2024: 1-4 - 2023
- [c2]Yuki Okamoto, Yusuke Komura, Toshiki Mizuguchi, Toshihiko Saito, Minato Ito, K. Kimura, Tatsuya Onuki, Yoshinori Ando, Hiromi Sawai, Tsutomu Murakawa, Hitoshi Kunitake, Takanori Matsuzaki, Hajime Kimura, M. Fujita, Makoto Ikeda, Shunpei Yamazaki:
1Mbit 1T1C 3D DRAM with Monolithically Stacked One Planar FET and Two Vertical FET Heterogeneous Oxide Semiconductor layers over Si CMOS. VLSI Technology and Circuits 2023: 1-2
2010 – 2019
- 2019
- [c1]Takahiko Ishizu, Yuto Yakubo, Kazuma Furutani, Atsuo Isobe, Masashi Fujita, Tomoaki Atsumi, Yoshinori Ando, Tsutomu Murakawa, Kiyoshi Kato, Masahiro Fujita, Shunpei Yamazaki:
A 48 MHz 880-nW Standby Power Normally-Off MCU with 1 Clock Full Backup and 4.69-μs Wakeup Featuring 60-nm Crystalline In-Ga-Zn Oxide BEOL-FETs. VLSI Circuits 2019: 48-
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last updated on 2024-08-05 20:20 CEST by the dblp team
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