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2020 – today
- 2025
[c7]Kaustubh Manohar Mhatre
, Venkata Guru Prasanth Mulleti, Curt John Bansil, Endri Taka, Aman Arora:
Performance Analysis of GEMM Workloads on the AMD Versal Platform. FPGA 2025: 46- [c6]Endri Taka, Ning-Chi Huang, Chi-Chih Chang, Kai-Chiang Wu, Aman Arora, Diana Marculescu:
Systolic Sparse Tensor Slices: FPGA Building Blocks for Sparse and Dense AI Acceleration. FPGA 2025: 159-171 - [i4]Endri Taka, Ning-Chi Huang, Chi-Chih Chang, Kai-Chiang Wu, Aman Arora, Diana Marculescu:
Systolic Sparse Tensor Slices: FPGA Building Blocks for Sparse and Dense AI Acceleration. CoRR abs/2502.03763 (2025) - 2024
- [c5]Ning-Chi Huang, Chi-Chih Chang, Wei-Cheng Lin, Endri Taka, Diana Marculescu, Kai-Chiang Wu:
ELSA: Exploiting Layer-wise N: M Sparsity for Vision Transformer Acceleration. CVPR Workshops 2024: 8006-8015 - [c4]Endri Taka, Dimitrios Gourounas, Andreas Gerstlauer, Diana Marculescu, Aman Arora:
Efficient Approaches for GEMM Acceleration on Leading AI-Optimized FPGAs. FCCM 2024: 54-65 - [i3]Endri Taka, Dimitrios Gourounas, Andreas Gerstlauer, Diana Marculescu, Aman Arora:
Efficient Approaches for GEMM Acceleration on Leading AI-Optimized FPGAs. CoRR abs/2404.11066 (2024) - [i2]Ning-Chi Huang, Chi-Chih Chang, Wei-Cheng Lin, Endri Taka, Diana Marculescu, Kai-Chiang Wu:
ELSA: Exploiting Layer-wise N:M Sparsity for Vision Transformer Acceleration. CoRR abs/2409.09708 (2024) - 2023
- [c3]Endri Taka, Aman Arora, Kai-Chiang Wu, Diana Marculescu:
MaxEVA: Maximizing the Efficiency of Matrix Multiplication on Versal AI Engine. ICFPT 2023: 96-105 - [i1]Endri Taka, Aman Arora, Kai-Chiang Wu, Diana Marculescu:
MaxEVA: Maximizing the Efficiency of Matrix Multiplication on Versal AI Engine. CoRR abs/2311.04980 (2023) - 2022
- [c2]Endri Taka, George Lentaris, Dimitrios Soudris:
Improving the performance of RISC-V softcores on FPGA by exploiting PVT variability and DVFS. ISCAS 2022: 1595-1599 - 2021
- [j1]Endri Taka, Konstantinos Maragos, George Lentaris, Dimitrios Soudris:
Process Variability Analysis in Interconnect, Logic, and Arithmetic Blocks of 16-nm FinFET FPGAs. ACM Trans. Reconfigurable Technol. Syst. 14(3): 13:1-13:30 (2021)
2010 – 2019
- 2019
- [c1]Konstantinos Maragos, Endri Taka, George Lentaris, Ioannis Stratakos, Dimitrios Soudris:
Analysis of Performance Variation in 16nm FinFET FPGA Devices. FPL 2019: 38-44
Coauthor Index
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