"Systolic Sparse Tensor Slices: FPGA Building Blocks for Sparse and Dense ..."

Endri Taka et al. (2025)

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DOI: 10.1145/3706628.3708867

access: closed

type: Conference or Workshop Paper

metadata version: 2025-05-19

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  - https://dblp.org/rec/conf/fpga/TakaHCWAM25
Endri Taka, Ning-Chi Huang, Chi-Chih Chang, Kai-Chiang Wu, Aman Arora, Diana Marculescu:
Systolic Sparse Tensor Slices: FPGA Building Blocks for Sparse and Dense AI Acceleration. FPGA 2025: 159-171

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