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Peter S. Colyer

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2010 – 2019

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2015
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Subhendu Roy, David Z. Pan, Pavlos M. Mattheakis, Peter S. Colyer, Laurent Masse-Navette, Pierre-Olivier Ribet:
Skew Bounded Buffer Tree Resynthesis For Clock Power Optimization. ACM Great Lakes Symposium on VLSI 2015: 87-90

1990 – 1999

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1998
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Peter S. Colyer, Joan L. Mitchell:
The IBM JBIG-ABIC Verification Suite. IBM J. Res. Dev. 42(6): 785-794 (1998)

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