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Jyoshnavi Akiri

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2020 – today

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2022
[c2]
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  dblp key:
  - conf/apccas/AkiriTYESW22
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Jyoshnavi Akiri, Lean Karlo S. Tolentino, Lung-Jieh Yang, Balasubramanian Esakki, Sivaperumal Sampath, Chua-Chin Wang:
A 500-MHz 32-bit DETFF-based Shift Register Utilizing 40-nm CMOS Technology. APCCAS 2022: 251-255
2021
[c1]
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Uday Kiran Naidu Ekkurthi, Venkatesh Dasari, Jyoshnavi Akiri, Chua-Chin Wang:
A 100 MHz 9.14-mW 8-Bit Shift Register Using Double-Edge Triggered Flip-Flop. ISCAS 2021: 1-4

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