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2020 – today
- 2021
[j104]Chua-Chin Wang
:
Tutorial: Design of High-Speed Nano-Scale CMOS Mixed-Voltage Digital I/O Buffer With High Reliability to PVTL Variations. IEEE Trans. Circuits Syst. II Express Briefs 68(2): 562-567 (2021)- 2020
- [j103]Chua-Chin Wang, Zong-You Hou, Yu-Lin Deng, U. Fat Chio, Wei Wang:
2-GHz 2×VDD 28-nm CMOS Digital Output Buffer with Slew Rate Auto-Adjustment Against Process and Voltage Variations. J. Circuits Syst. Comput. 29(6): 2050088:1-2050088:17 (2020) - [j102]Chua-Chin Wang, Zong-You Hou, Deng-Shian Wang, Chia-Lung Hsieh:
A Single-Ended 28-nm CMOS 6T SRAM Design with Read-assist Path and PDP Reduction Circuitry. J. Circuits Syst. Comput. 29(6): 2050095:1-2050095:18 (2020) - [j101]Tzung-Je Lee, Ssu-Wei Huang, Chua-Chin Wang:
A Slew Rate Enhanced 2 x VDD I/O Buffer With Precharge Timing Technique. IEEE Trans. Circuits Syst. 67-II(11): 2707-2711 (2020) - [j100]Chua-Chin Wang, Kuan-Yu Chao, Sivaperumal Sampath, Ponnan Suresh:
Anti-PVT-Variation Low-Power Time-to-Digital Converter Design Using 90-nm CMOS Process. IEEE Trans. Very Large Scale Integr. Syst. 28(9): 2069-2073 (2020) - [j99]Chua-Chin Wang, Nanang Sulistiyanto, Hsiang-Yu Shih, Yu-Cheng Lin, Wei Wang:
Power-effective ROM-less DDFS Design Approach with High SFDR Performance. J. Signal Process. Syst. 92(2): 213-224 (2020) - [c104]Chua-Chin Wang, Shao-Wei Lu:
100 MHz Random Number Generator Design Using Interleaved Metastable NAND/NOR Latches*. APCCAS 2020: 98-101 - [c103]Chua-Chin Wang, Chia-Yi Huang, Chu-Han Lin, Chia-Hung Yeh, Guan-Xian Liu, Yu-Cheng Chou:
3D-Modeling Dataset Augmentation for Underwater AUV Real-time Manipulations. APCCAS 2020: 145-148
2010 – 2019
- 2019
- [j98]Chua-Chin Wang, Tsung-Yi Tsai, Yu-Lin Deng, Tzung-Je Lee:
500 MHz 90 nm CMOS 2 \(\times \) VDD Digital Output Buffer Immunity to Process and Voltage Variations. Circuits Syst. Signal Process. 38(2): 556-568 (2019) - [j97]Tzung-Je Lee, Tsung-Yi Tsai, Wei Lin, U. Fat Chio, Chua-Chin Wang:
A Slew Rate Variation Compensated 2× VDD I/O Buffer Using Deterministic P/N-PVT Variation Detection Method. IEEE Trans. Circuits Syst. II Express Briefs 66-II(1): 116-120 (2019) - [j96]Chua-Chin Wang, Pang-Yen Lou, Tsung-Yi Tsai, Hsiang-Yu Shih:
74-dBc SFDR 71-MHz Four-Stage Pipeline ROM-Less DDFS Using Factorized Second-Order Parabolic Equations. IEEE Trans. Very Large Scale Integr. Syst. 27(10): 2464-2468 (2019) - [c102]Chun-Ting Chen, Tsung-Yi Tsai, Yi-Jen Chiu, Chua-Chin Wang:
Sampling Rate Enhancement for SAR-ADCs Using Adaptive Reset Approach for FOG Systems. ASICON 2019: 1-4 - [c101]Pang-Yen Lou, Chien-Hua Chu, Chua-Chin Wang:
A Broken Line Detection Circuit for Multi-cell Li-ion Battery Module1. ICCE 2019: 1-2 - [c100]Nanang Sulistiyanto, Chua-Chin Wang, Robert Rieger:
A Low Frequency OTA Design with Temperature-Insensitive Variable Transconductance Using 180-nm CMOS Technology. ICICDT 2019: 1-4 - [c99]Tsung-Yi Tsai, Ting-Sheng Wang, Yi-Jen Chiu, Chua-Chin Wang:
A PVT Validation Phase-Lock Loop with Multi-Band VCO Applied in Closed-Loop FOGs. ICICDT 2019: 1-4 - [c98]Chua-Chin Wang, I-Ting Tseng:
Ultra Low Power Single-ended 6T SRAM Using 40 nm CMOS Technology. ICICDT 2019: 1-4 - [c97]Tzung-Je Lee, Chia-Hsin Hsu, Chua-Chin Wang:
High Efficiency Buck Converter with Wide Load Current Range using Dual-Mode of PWM and PSM. ISCAS 2019: 1-4 - [c96]Chua-Chin Wang, Guan-Xian Liu:
A 1.5A 88.6% Li-ion Battery Charger Design using Pulse Swallow Technique in Light Load. ISCAS 2019: 1-4 - 2018
- [j95]Chua-Chin Wang, Zong-You Hou, Chih-Lin Chen, Doron Shmilovitz:
A Lock Detector Loop for Low-power PLL-Based Clock and Data Recovery Circuits. Circuits Syst. Signal Process. 37(4): 1692-1703 (2018) - [j94]Chua-Chin Wang, Zong-You Hou, Jhih-Cheng You:
A High-Precision CMOS Temperature Sensor with Thermistor Linear Calibration in the (-5 °C, 120 °C) Temperature Range. Sensors 18(7): 2165 (2018) - [c95]Chua-Chin Wang, Zong-You Hou, Ssu-Wei Huang:
40-nm 2×VDD Digital Output Buffer Design With DDR4-Compliant Slew Rate. APCCAS 2018: 279-282 - [c94]Hao-Chun Huang, Deng-Shian Wang, Chua-Chin Wang:
A frequency-shift readout system with offset cancellation OPA for portable devices of marijuana detection. ICCE 2018: 1-2 - 2017
- [j93]Wen-Hui Huang, I-Yu Huang, Yu-Shan Tseng, Chia-Hsu Hsieh, Chua-Chin Wang:
A 19.38 dBm OIP3 gm-boosted up-conversion CMOS mixer for 5-6 GHz application. Microelectron. J. 60: 38-44 (2017) - [j92]Deng-Shian Wang, Yu-Hsun Su, Chua-Chin Wang:
A readout circuit with cell output slew rate compensation for 5T single-ended 28 nm CMOS SRAM. Microelectron. J. 70: 107-116 (2017) - [j91]Je-Wei Lan, Chia-Hsu Hsieh, I-Yu Huang, Yu-Cheng Lin, Tsung-Yi Tsai, Chua-Chin Wang:
Highly Sensitive FPW-Based Microsystem for Rapid Detection of Tetrahydrocannabinol in Human Urine. Sensors 17(12): 2760 (2017) - [j90]Chua-Chin Wang, Zong-You Hou, Kai-Wei Ruan:
2×VDD 40-nm CMOS Output Buffer With Slew Rate Self-Adjustment Using Leakage Compensation. IEEE Trans. Circuits Syst. II Express Briefs 64-II(7): 812-816 (2017) - [j89]Tzung-Je Lee, Tsung-Yi Tsai, Wei Lin, U-Fat Chio, Chua-Chin Wang:
A Dynamic Leakage and Slew Rate Compensation Circuit for 40-nm CMOS Mixed-Voltage Output Buffer. IEEE Trans. Very Large Scale Integr. Syst. 25(11): 3166-3174 (2017) - [c93]Zong-You Hou, Hsiu-Chun Tsai, Chua-Chin Wang:
High-voltage bidirectional current sensor. ASICON 2017: 1145-1146 - [c92]Zong-You Hou, Pang-Yen Lou, Chua-Chin Wang:
State of charge, state of health, and state of function monitoring for EV BMS. ICCE 2017: 310-311 - [c91]Zong-You Hou, Zong-Ying Ho, Jhih-Cheng You, Chua-Chin Wang:
A primary-side output current estimator with process compensator for flyback LED drivers. ISCAS 2017: 1-4 - [c90]Tsung-Yi Tsai, Hsiang-Yu Shih, Chua-Chin Wang:
A pipeline ROM-less DDFS using equal-division interpolation. ISOCC 2017: 19-20 - 2016
- [j88]Chua-Chin Wang, Zong-You Hou, Wen-Je Lu, Sheng-Syong Wang:
High-voltage on-chip current sensor design and analysis for battery modules. IET Circuits Devices Syst. 10(6): 492-496 (2016) - [j87]Chua-Chin Wang, Deng-Shian Wang, Chiang-Hsiang Liao, Sih-Yu Chen:
A Leakage Compensation Design for Low Supply Voltage SRAM. IEEE Trans. Very Large Scale Integr. Syst. 24(5): 1761-1769 (2016) - [c89]Chua-Chin Wang, Zong-You Hou, Teng-Wei Huang:
A flyback driver with adaptive switching frequency control for smart lighting1. ICCE 2016: 105-106 - [c88]Zong-You Hou, Teng-Wei Huang, Chua-Chin Wang:
On-chip accurate primary-side output current estimator for flyback LED driver control. ICICDT 2016: 1-4 - [c87]Tsung-Yi Tsai, Yan-You Chou, Chua-Chin Wang:
A method of leakage reduction and slew-rate adjustment in 2×VDD output buffer for 28 nm CMOS technology and above. ICICDT 2016: 1-4 - [c86]Tsung-Yi Tsai, Yu-Lin Teng, Chua-Chin Wang:
A nano-scale 2×VDD I/O buffer with encoded PV compensation technique. ISCAS 2016: 598-601 - [c85]Yu-Ting Tu, Deng-Shian Wang, Chua-Chin Wang:
An accurate phase shift detector using bulk voltage boosting technique for sensing applications. ISCAS 2016: 2110-2113 - [c84]Chua-Chin Wang, Chia-Lung Hsieh:
Disturb-free 5T loadless SRAM cell design with multi-vth transistors using 28 nm CMOS process. ISOCC 2016: 103-104 - [c83]Deng-Shian Wang, Yun-Shen Liu, Chua-Chin Wang:
A novel frequency-shift readout system for CEA concentration detection application. ISOCC 2016: 133-134 - 2015
- [j86]Chua-Chin Wang, Wen-Je Lu, Kai-Wei Juan, Wei Lin, Hsin-Yuan Tseng, Chun-Ying Juan:
Process corner detection by skew inverters for 500 MHZ 2×VDD output buffer using 40-nm CMOS technology. Microelectron. J. 46(1): 1-11 (2015) - [j85]Chua-Chin Wang, Deng-Shian Wang, Tzu-Chiao Sung, Yi-Jie Hsieh, Tzung-Je Lee:
A ±3.07% frequency variation clock generator implemented using HV CMOS process. Microelectron. J. 46(4): 285-290 (2015) - [j84]Chua-Chin Wang, Wen-Je Lu, Tzu-Chao Wu:
Wide-range CTAT and PTAT sensors with second-order calibration for on-chip thermal monitoring. Microelectron. J. 46(9): 819-824 (2015) - [j83]Chua-Chin Wang, Tsung-Yi Tsai, Wen-Je Lu, Chih-Lin Chen, Yi-Lun Wu:
A 30 V rail-to-rail operational amplifier. Microelectron. J. 46(10): 911-915 (2015) - [j82]Chua-Chin Wang, Wen-Je Lu, Tsung-Yi Tsai:
Analysis of Calibrated On-Chip Temperature Sensor With Process Compensation for HV Chips. IEEE Trans. Circuits Syst. II Express Briefs 62-II(3): 217-221 (2015) - [j81]Chua-Chin Wang, Chih-Lin Chen, Zong-You Hou, Yi Hu, Jam-Wem Lee, Wan-Yen Lin, Yi-Feng Chang, Chia-Wei Hsu, Ming-Hsiang Song:
A 60 V Tolerance Transceiver With ESD Protection for FlexRay-Based Communication Systems. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(3): 752-760 (2015) - [j80]Chih-Lin Chen, Deng-Shian Wang, Jie-Jyun Li, Chua-Chin Wang:
A Voltage Monitoring IC With HV Multiplexer and HV Transceiver for Battery Management Systems. IEEE Trans. Very Large Scale Integr. Syst. 23(2): 244-253 (2015) - [c82]Chua-Chin Wang, Min-Yu Tseng:
10 Mbps high-voltage digital transciever on single die for 50 V voltage swing. ASICON 2015: 1-4 - [c81]Chih-Lin Chen, Deng-Shian Wang, Jie-Jyun Li, Chua-Chin Wang:
A high-voltage Transceiver for electrical vehicle Battery Management Systems. ICCE 2015: 295-296 - [c80]Chua-Chin Wang, Tsung-Yi Tsai, Wei Lin:
A high-speed 2×VDD output buffer with PVTL detection using 40-nm CMOS technology. ICICDT 2015: 1-4 - [c79]Chua-Chin Wang, Deng-Shian Wang, Shiou-Ya Chen, Chia-Ming Chang:
A wide range and high conversion gain power detector for frequency shift sensing applications. MWSCAS 2015: 1-4 - 2014
- [j79]Doron Shmilovitz, Shaul Ozeri, Chua-Chin Wang, Boaz Spivak:
Noninvasive Control of the Power Transferred to an Implanted Device by an Ultrasonic Transcutaneous Energy Transfer Link. IEEE Trans. Biomed. Eng. 61(4): 995-1004 (2014) - [j78]Chua-Chin Wang, Chih-Lin Chen, Gang-Neng Sung, Ching-Lin Wang, Chun-Ying Juan:
A FlexRay Transceiver Design with Bus Guardian for In-car Networking Systems Compliant with FlexRay Standard. J. Signal Process. Syst. 74(2): 221-233 (2014) - [c78]Chua-Chin Wang, Deng-Shian Wang, Shiou-Ya Chen, Chia-Ming Chang:
A 20 GHz power detector with 176 mV/dB conversion gain. APCCAS 2014: 551-554 - [c77]Chua-Chin Wang, Wen-Je Lu, Min-Yu Tseng:
An all-digital battery capacity monitor using calibrated current estimation approach. APCCAS 2014: 563-566 - [c76]Tzung-Je Lee, Kai-Wei Ruan, Chua-Chin Wang:
32% Slew rate and 27% data rate improved 2×VDD output buffer using PVTL compensation. ICICDT 2014: 1-4 - [c75]Chua-Chin Wang, Wen-Je Lu, Sheng-Syong Wang:
An on-chip high-voltage current sensor for battery module monitoring. ICICDT 2014: 1-4 - [c74]Chua-Chin Wang, Wen-Je Lu, Tzu-Chao Wu, Chun-Ying Juan:
A CMOS wide-range temperature sensor with process compensation and second-order calibration for Battery Management Systems. ISCAS 2014: 586-589 - [c73]Chua-Chin Wang, Chiang-Hsiang Liao, Sih-Yu Chen:
A single-ended disturb-free 5T loadless SRAM with leakage sensor and read delay compensation using 40 nm CMOS process. ISCAS 2014: 1126-1129 - 2013
- [j77]Chua-Chin Wang, Chih-Lin Chen, Jie-Jyun Li, Gang-Neng Sung, Tai-Hao Yeh, Chun-Ying Juan:
A low-power transceiver design for FlexRay-based communication systems. Microelectron. J. 44(4): 359-366 (2013) - [j76]Chua-Chin Wang, Wen-Je Lu, Chih-Lin Chen, Hsin-Yuan Tseng, Ron-Chi Kuo, Chun-Ying Juan:
A 2×VDD output buffer with PVT detector for slew rate compensation. Microelectron. J. 44(5): 393-399 (2013) - [j75]Chua-Chin Wang, Tzu-Chiao Sung, Chia-Hao Hsu, Yue-Da Tsai, Yun-Chi Chen, Ming-Chih Lee, I-Yu Huang:
A Protein Concentration Measurement System Using a Flexural Plate-Wave Frequency-Shift Readout Technique. Sensors 13(1): 86-105 (2013) - [j74]Chua-Chin Wang, Chih-Lin Chen, Hsin-Yuan Tseng, Hsiao-Han Hou, Chun-Ying Juan:
A 800 Mbps and 12.37 ps Jitter Bidirectional Mixed-Voltage I/O Buffer With Dual-Path Gate-Tracking Circuit. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(1): 116-124 (2013) - [j73]Chua-Chin Wang, Chih-Lin Chen, Ron-Chi Kuo, Hsin-Yuan Tseng, Jen-Wei Liu, Chun-Ying Juan:
On-Chip Process and Temperature Monitor for Self-Adjusting Slew Rate Control of 2, ×, VDD Output Buffers. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(6): 1432-1440 (2013) - [c72]Chih-Lin Chen, Zong-You Hou, Sheng-Chih Lin, Chua-Chin Wang:
A delay-based transceiver with over-current protection for ECU nodes in automobile FlexRay systems. ICCE 2013: 610-611 - [c71]Chih-Lin Chen, Yi-Lun Wu, Chun-Ying Juan, Chua-Chin Wang:
High voltage operational amplifier and high voltage transceiver using 0.25 µm 60V BCD process for Battery Management Systems. ICICDT 2013: 97-100 - [c70]Chua-Chin Wang, Wen-Je Lu, Hsin-Yuan Tseng:
A high-speed 2×VDD output buffer with PVT detection using 40-nm CMOS technology. ISCAS 2013: 2079-2082 - 2012
- [j72]Shang-Hsien Yang, Chua-Chin Wang:
Feed-forward Output Swing Prediction AGC design with Parallel-Detect Singular-Store Peak Detector. Microelectron. J. 43(4): 250-256 (2012) - [j71]Shang-Hsien Yang, Chua-Chin Wang:
A low power 48-dB/stage linear-in-dB variable gain amplifier for direct-conversion receivers. Microelectron. J. 43(4): 274-279 (2012) - [j70]Shang-Hsien Yang, Jen-Wei Liu, Chua-Chin Wang:
A Single-Chip 60-V Bulk Charger for Series Li-Ion Batteries With Smooth Charge-Mode Transition. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(7): 1588-1597 (2012) - [j69]Chua-Chin Wang, Chia-Hao Hsu, Gang-Neng Sung, Yu-Cheng Lu:
A Signed Array Multiplier with Bypassing Logic. J. Signal Process. Syst. 66(2): 87-92 (2012) - [c69]Tzung-Je Lee, Wen-Je Lu, Wei-Chih Hsiao, Chua-Chin Wang:
Linear programmable gain amplifier using reconfiguration local-feedback transconductors. APCCAS 2012: 228-231 - [c68]Chua-Chin Wang, Tzu-Chiao Sung, Yihong Wu, Chia-Hao Hsu, Doron Shmilovitz:
A reconfigurable 16-channel HV stimulator ASIC for Spinal Cord Stimulation systems. APCCAS 2012: 300-303 - [c67]Chua-Chin Wang, Chih-Lin Chen, Jie-Jyun Li, Chun-Ying Juan:
Configurable Active Star design for automobile FlexRay systems. ICCE 2012: 301-302 - [c66]Gang-Neng Sung, Chun-Ming Huang, Chua-Chin Wang:
A PLC transceiver design of in-vehicle power line in FlexRay-based automotive communication systems. ICCE 2012: 309-310 - [c65]Chia-Hao Hsu, Yue-Da Tsai, Yun-Chi Chen, Ming-Chih Lee, I-Yu Huang, Chua-Chin Wang:
A fast FPW allergy analyzer prototype for point of care (POC). ICCE 2012: 540-541 - [c64]Chih-Lin Chen, Yi Hu, Wayne Luo, Chua-Chin Wang, Chun-Ying Juan:
A high voltage analog multiplexer with digital calibration for battery management systems. ICICDT 2012: 1-4 - [c63]Chih-Lin Chen, Hsin-Yuan Tseng, Ron-Chi Kuo, Chua-Chin Wang:
On-chip MOS PVT variation monitor for slew rate self-adjusting 2×VDD output buffers. ICICDT 2012: 1-4 - [c62]Sih-Yu Chen, Chua-Chin Wang:
Single-ended disturb-free 5T loadless SRAM Cell using 90 nm CMOS process. ICICDT 2012: 1-4 - [c61]Tzung-Je Lee, Doron Shmilovitz, Yi-Jie Hsieh, Chua-Chin Wang:
Temperature and process compensated clock generator using feedback TPC bias. ICICDT 2012: 1-4 - [c60]Chih-Lin Chen, Sheng-Chih Lin, Chua-Chin Wang, Chun-Ying Juan:
A digital over-temperature protector for FlexRay systems. ISCAS 2012: 1991-1994 - [c59]Chua-Chin Wang, Chia-Hao Hsu, Yue-Da Tsai, Yun-Chi Chen, Ming-Chih Lee, I-Yu Huang:
A fast FPW-based protein concentration measurement system. ISCAS 2012: 2389-2392 - [c58]Shang-Hsien Yang, Chua-Chin Wang:
Feed-forward Output Swing Prediction AGC with Parallel-Detect Singular-Store Peak Detector. ISCAS 2012: 2965-2968 - [c57]Chih-Lin Chen, Deng-Shian Wang, Jie-Jyun Li, Chua-Chin Wang:
A Battery Interconnect Module with high voltage transceiver using 0.25 µm 60V BCD process for Battery Management Systems. ISOCC 2012: 1-4 - [c56]Chih-Lin Chen, Hsin-Yuan Tseng, Ron-Chi Kuo, Chua-Chin Wang:
A slew rate self-adjusting 2×VDD output buffer With PVT compensation. VLSI-DAT 2012: 1-4 - 2011
- [j68]Chua-Chin Wang, Chih-Lin Chen, Gang-Neng Sung, Ching-Lin Wang:
A high-efficiency DC-DC buck converter for sub-2×VDD power supply. Microelectron. J. 42(5): 709-717 (2011) - [j67]Chua-Chin Wang, Ron-Chi Kuo, Tung-Han Tsai:
A high precision low dropout regulator with nested feedback loops. Microelectron. J. 42(7): 966-971 (2011) - [j66]Chia-Hao Hsu, Shao-Bin Tseng, Yi-Jie Hsieh, Chua-Chin Wang:
One-Time-Implantable Spinal Cord Stimulation System Prototype. IEEE Trans. Biomed. Circuits Syst. 5(5): 490-498 (2011) - [j65]Chua-Chin Wang, Chia-Hao Hsu, Szu-Chia Liao, Yi-Cheng Liu:
A Wide Voltage Range Digital I/O Design Using Novel Floating N-Well Circuit. IEEE Trans. Very Large Scale Integr. Syst. 19(8): 1481-1485 (2011) - [j64]Chua-Chin Wang, Chia-Hao Hsu, Chia-Chuan Lee, Jian-Ming Huang:
A ROM-less DDFS Based on a Parabolic Polynomial Interpolation Method with an Offset. J. Signal Process. Syst. 64(3): 351-359 (2011) - [c55]Chua-Chin Wang, Chih-Lin Chen, Tai-Hao Yeh, Yi Hu, Gang-Neng Sung:
A high speed transceiver front-end design with fault detection for FlexRay-based automotive communication systems. ISCAS 2011: 434-437 - [c54]Shang-Hsien Yang, Jen-Wei Liu, Yihong Wu, Deng-Sian Wang, Chua-Chin Wang:
A high voltage battery charger with smooth charge mode transition in BCD process. ISCAS 2011: 813-816 - [c53]Shang-Hsien Yang, Chua-Chin Wang:
A 48-dB dynamic gain range/stage linear-in-dB low power Variable Gain Amplifier for direct-conversion receivers. ISOCC 2011: 182-1 - 2010
- [j63]Chua-Chin Wang, Gang-Neng Sung, Jian-Ming Huang, Lung-Hsuan Lee, Chih-Peng Li:
A low-power 2.45 GHz WPAN modulator/demodulator. Microelectron. J. 41(2-3): 150-154 (2010) - [j62]Chua-Chin Wang, Chia-Hao Hsu, Chi-Chun Huang, Jun-Han Wu:
A Self-Disabled Sensing Technique for Content-Addressable Memories. IEEE Trans. Circuits Syst. II Express Briefs 57-II(1): 31-35 (2010) - [j61]Chi-Chun Huang, Tzung-Je Lee, Wei-Chih Chang, Chua-Chin Wang:
(1/3) times hboxVDD-to- (3/2) times hboxVDD Wide-Range I/O Buffer Using 0.35- muhboxm 3.3-V CMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs 57-II(2): 126-130 (2010) - [j60]Chua-Chin Wang, Gang-Neng Sung, Po-Cheng Chen, Chin-Long Wey:
A Transceiver Front End for Electronic Control Units in FlexRay-Based Automotive Communication Systems. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(2): 460-470 (2010) - [j59]Chua-Chin Wang, Chih-Lin Chen, Ron-Chi Kuo, Doron Shmilovitz:
Self-Sampled All-MOS ASK Demodulator for Lower ISM Band Applications. IEEE Trans. Circuits Syst. II Express Briefs 57-II(4): 265-269 (2010) - [j58]Chua-Chin Wang, Felix Lustenberger, Yehia Massoud, Wouter A. Serdijn:
Guest Editorial Special Issue on ISCAS 2009. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(5): 953-955 (2010) - [j57]Chua-Chin Wang, Chia-Hao Hsu, Yi-Cheng Liu:
A 1/2 times hbox VDD to 3 times hbox VDD Bidirectional I/O Buffer With a Dynamic Gate Bias Generator. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(7): 1642-1653 (2010) - [j56]Gang-Neng Sung, Szu-Chia Liao, Jian-Ming Huang, Yu-Cheng Lu, Chua-Chin Wang:
All-Digital Frequency Synthesizer Using a Flying Adder. IEEE Trans. Circuits Syst. II Express Briefs 57-II(8): 597-601 (2010) - [j55]Chua-Chin Wang, Ron-Chi Kuo, Jen-Wei Liu:
0.9 V to 5 V Bidirectional Mixed-Voltage I/O Buffer With an ESD Protection Output Stage. IEEE Trans. Circuits Syst. II Express Briefs 57-II(8): 612-616 (2010) - [j54]Chua-Chin Wang, Gang-Neng Sung, Ming-Kai Chang, Ying-Yu Shen:
Energy-Efficient Double-Edge Triggered Flip-Flop. J. Signal Process. Syst. 61(3): 347-352 (2010) - [c52]Ron-Chi Kuo, Hsiao-Han Hou, Chua-Chin Wang:
A PCI166-compatible 3×VDD-tolerant mixed-voltage I/O buffer. APCCAS 2010: 320-323 - [c51]Ron-Chi Kuo, Tung-Han Tsai, Yi-Jie Hsieh, Chua-Chin Wang:
A high precision low dropout regulator with nested feedback loops. APCCAS 2010: 664-667 - [c50]Chua-Chin Wang, Chi-Chun Huang, Yi-Cheng Liu, Victor Pikov, Doron Shmilovitz:
A mini-invasive multi-function biomedical pressure measurement system ASIC. ISCAS 2010: 2936-2939 - [c49]Chua-Chin Wang, Szu-Chia Liao, Yi-Cheng Liu:
A 125-MHz wide-range mixed-voltage I/O buffer using gated Floating N-well circuit. ISCAS 2010: 3421-3424
2000 – 2009
- 2009
- [j53]Sen-Hung Wang, Chih-Peng Li, Chao-Tang Yu, Jian-Ming Huang, Chua-Chin Wang:
Baseband Receiver Design for the MBOA Ultra Wideband Wireless Personal Area Networks. IEICE Trans. Commun. 92-B(1): 143-149 (2009) - [j52]Tzung-Je Lee, Tieh-Yen Chang, Chua-Chin Wang:
Wide-Range 5.0/3.3/1.8-V I/O Buffer Using 0.35-m 3.3-V CMOS Technology. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(4): 763-772 (2009) - [j51]Chua-Chin Wang, Gang-Neng Sung:
Low-Power Multiplier Design Using a Bypassing Technique. J. Signal Process. Syst. 57(3): 331-338 (2009) - [c48]Chia-Hao Hsu, Gang-Neng Sung, Tuo-Yu Yao, Chun-Ying Juan, Yain-Reu Lin, Chua-Chin Wang:
Low-power 7.2 GHz Complementary All-N-Transistor Logic using 90 nm CMOS Technology. ISCAS 2009: 389-392 - [c47]Shaul Ozeri, Doron Shmilovitz, Chua-Chin Wang:
A Drive Circuit for Piezoelectric Devices with Low Harmonics Content. ISCAS 2009: 1093-1096 - 2008
- [j50]Chua-Chin Wang, Gang-Neng Sung, Chi-Chun Huang, Ching-Li Lee, Tian-Hau Chen, Wun-Ji Lin, Ron Hu:
A 1.7-ns Access Time SRAM Using Variable Bulk Bias wordline-Controlled transistors. J. Circuits Syst. Comput. 17(5): 943-956 (2008) - [j49]Chua-Chin Wang, Chi-Chun Huang, Ching-Li Lee, Chien-Chih Hung, Li-Pin Lin:
A single-chip CMOS IF-band converter design for DVB-T receivers. Microelectron. J. 39(1): 117-129 (2008) - [j48]Chua-Chin Wang, Tzung-Je Lee, U. Fat Chio, Yu-Tzu Hsiao, Jia-Jin Chen:
A 570-kbps ASK demodulator without external capacitors for low-frequency wireless bio-implants. Microelectron. J. 39(1): 130-136 (2008) - [j47]Chua-Chin Wang, Chi-Chun Huang, Sheng-Lun Tseng:
A low-power ADPLL using feedback DCO quarterly disabled in time domain. Microelectron. J. 39(5): 832-840 (2008) - [j46]Chua-Chin Wang, Chi-Chun Huang, Jian-Sing Liou, Yan-Jhin Ciou, I-Yu Huang, Chih-Peng Li, Yung-Chin Lee, Weng-Jeng Wu:
A Mini-Invasive Long-Term Bladder Urine Pressure Measurement ASIC and System. IEEE Trans. Biomed. Circuits Syst. 2(1): 44-49 (2008) - [j45]Tzung-Je Lee, Ching-Li Lee, Yan-Jhin Ciou, Chi-Chun Huang, Chua-Chin Wang:
All-MOS ASK Demodulator for Low-Frequency Applications. IEEE Trans. Circuits Syst. II Express Briefs 55-II(5): 474-478 (2008) - [j44]Chua-Chin Wang, Chi-Chun Huang, Ching-Li Lee, Tsai-Wen Cheng:
A Low Power High-Speed 8-Bit Pipelining CLA Design Using Dual-Threshold Voltage Domino Logic. IEEE Trans. Very Large Scale Integr. Syst. 16(5): 594-598 (2008) - [j43]Chua-Chin Wang, Chi-Chun Huang, Jian-Ming Huang, Chih-Yi Chang, Chih-Peng Li:
ZigBee 868/915-MHz Modulator/Demodulator for Wireless Personal Area Network. IEEE Trans. Very Large Scale Integr. Syst. 16(7): 936-939 (2008) - [j42]Tzung-Je Lee, Chua-Chin Wang:
A Phase-Locked Loop with 30% Jitter Reduction Using Separate Regulators. VLSI Design 2008: 512946:1-512946:8 (2008) - [j41]Chua-Chin Wang, Gang-Neng Sung, Pai-Li Liu:
Power-Aware Design of An 8-Bit Pipelining ANT-Based CLA Using Data Transition Detec