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David Van Campenhout
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2000 – 2009
- 2003
- [c5]Cindy Eisner, Dana Fisman, John Havlicek, Yoad Lustig, Anthony McIsaac, David Van Campenhout:
Reasoning with Temporal Logic on Truncated Paths. CAV 2003: 27-39 - [c4]Cindy Eisner, Dana Fisman, John Havlicek, Anthony McIsaac, David Van Campenhout:
The Definition of a Temporal Clock Operator. ICALP 2003: 857-870 - 2000
- [j4]David Van Campenhout, Trevor N. Mudge, John P. Hayes:
Collection and Analysis of Microprocessor Design Errors. IEEE Des. Test Comput. 17(4): 51-60 (2000)
1990 – 1999
- 1999
- [b1]David Van Campenhout:
Functional design verification for microprocessors by error modeling. University of Michigan, USA, 1999 - [j3]David Van Campenhout, Trevor N. Mudge, Karem A. Sakallah:
Timing verification of sequential dynamic circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(5): 645-658 (1999) - [c3]David Van Campenhout, Trevor N. Mudge, John P. Hayes:
High-Level Test Generation for Design Verification of Pipelined Microprocessors. DAC 1999: 185-188 - 1998
- [j2]James K. Huggins, David Van Campenhout:
Specification and verification of pipelining in the ARM2 RISC microprocessor. ACM Trans. Design Autom. Electr. Syst. 3(4): 563-580 (1998) - [j1]David Van Campenhout, Hussain Al-Asaad, John P. Hayes, Trevor N. Mudge, Richard B. Brown:
High-level design verification of microprocessors via error modeling. ACM Trans. Design Autom. Electr. Syst. 3(4): 581-599 (1998) - 1996
- [c2]David Van Campenhout, Trevor N. Mudge, Karem A. Sakallah:
Timing verification of sequential domino circuits. ICCAD 1996: 127-132 - 1993
- [c1]Dirk Daneels, David Van Campenhout, Wayne Niblack, William Equitz, Ron Barber, Erwin Bellon, Freddy Fierens:
Interactive Outlining: An Improved Approach Using Active Contours. Storage and Retrieval for Image and Video Databases (SPIE) 1993: 226-233
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