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Books and Theses
- 1986
[b1]Jih-Kwon Peir:
Program Partitioning and Synchronization on Multiprocessor Systems (Parallel, Computer Architecture, Compiler). University of Illinois Urbana-Champaign, USA, 1986
Journal Articles
- 2023
- [j21]Haibo Wang
, Chaoyi Ma, Olufemi O. Odegbile, Shigang Chen, Jih-Kwon Peir:
Randomized Error Removal for Online Spread Estimation in High-Speed Networks. IEEE/ACM Trans. Netw. 31(2): 558-573 (2023) - 2021
- [j20]Haibo Wang, Chaoyi Ma, Olufemi O. Odegbile, Shigang Chen, Jih-Kwon Peir:
Randomized Error Removal for Online Spread Estimation in Data Streaming. Proc. VLDB Endow. 14(6): 1040-1052 (2021) - 2011
- [j19]Gang Liu, Zhuo Huang, Jih-Kwon Peir, Xudong Shi, Lu Peng:
Enhancements for Accurate and Timely Streaming Prefetcher. J. Instr. Level Parallelism 13 (2011) - [j18]MyungKeun Yoon, Tao Li, Shigang Chen, Jih-Kwon Peir:
Fit a Compact Spread Estimator in Small High-Speed Memory. IEEE/ACM Trans. Netw. 19(5): 1253-1264 (2011) - 2009
- [j17]Xudong Shi, Feiqi Su, Jih-Kwon Peir, Ye Xia, Zhen Yang:
Modeling and Stack Simulation of CMP Cache Capacity and Accessibility. IEEE Trans. Parallel Distributed Syst. 20(12): 1752-1763 (2009) - 2008
- [j16]Lu Peng, Jih-Kwon Peir, Tribuvan K. Prakash, Carl Staelin, Yen-Kuang Chen, David M. Koppelman:
Memory hierarchy performance measurement of commercial dual-core desktop processors. J. Syst. Archit. 54(8): 816-828 (2008) - 2007
- [j15]Xudong Shi, Feiqi Su, Jih-Kwon Peir, Ye Xia, Zhen Yang:
CMP cache performance projection: accessibility vs. capacity. SIGARCH Comput. Archit. News 35(1): 13-20 (2007) - 2004
- [j14]Lu Peng, Jih-Kwon Peir, Konrad Lai:
A New Address-Free Memory Hierarchy Layer for Zero-Cycle Load. J. Instr. Level Parallelism 6 (2004) - 2003
- [j13]Lu Peng, Jih-Kwon Peir, Qianrong Ma, Konrad Lai:
Address-free memory access based on program syntax correlation of loads and stores. IEEE Trans. Very Large Scale Integr. Syst. 11(3): 314-324 (2003) - 2000
- [j12]Jih-Kwon Peir, Windsor W. Hsu, Honesty C. Young, Shauchi Ong:
Improving cache performance with Full-Map Block Directory. J. Syst. Archit. 46(5): 439-454 (2000) - 1999
- [j11]Jih-Kwon Peir, Windsor W. Hsu, Alan Jay Smith:
Functional Implementation Techniques for CPU Cache Memories. IEEE Trans. Computers 48(2): 100-110 (1999) - 1998
- [j10]Yunn Yen Chen, Jih-Kwon Peir, Chung-Ta King:
Performance of Shared Caches on Multithreaded Architectures. J. Inf. Sci. Eng. 14(2): 499-514 (1998) - [j9]Byung-Kwon Chung, Jih-Kwon Peir:
LRU-based column-associative caches. SIGARCH Comput. Archit. News 26(2): 9-17 (1998) - 1993
- [j8]Wei-Tsung Sun, Yunn Yen Chen, Jih-Kwon Peir, Chung-Ta King:
Shared Translation Lookaside Buffers on Multiprocessors and a Performance Study. J. Inf. Sci. Eng. 9(1): 123-135 (1993) - [j7]Kien A. Hua, Chiang Lee, Jih-Kwon Peir:
A High Performance Hybrid Architecture for Concurrent Query Execution. J. Inf. Sci. Eng. 9(2): 177-199 (1993) - [j6]Jih-Kwon Peir, Yann-Hang Lee:
Look-Ahead Routing Switches for Multistage Interconnection Networks. J. Parallel Distributed Comput. 19(1): 1-10 (1993) - [j5]Kien A. Hua, Lishing Liu, Jih-Kwon Peir:
Designing High-Performance Processors Using Real Address Prediction. IEEE Trans. Computers 42(9): 1146-1151 (1993) - [j4]Lishing Liu, Jih-Kwon Peir:
Cache sampling by sets. IEEE Trans. Very Large Scale Integr. Syst. 1(2): 98-105 (1993) - 1989
- [j3]Jih-Kwon Peir, Ron Cytron:
Minimum Distance: A Method for Partitioning Recurrences for Multiprocessors. IEEE Trans. Computers 38(8): 1203-1211 (1989) - 1985
- [j2]Daniel Gajski, Jih-Kwon Peir:
Essential Issues in Multiprocessor Systems. Computer 18(6): 9-27 (1985) - [j1]Daniel Gajski, Jih-Kwon Peir:
Comparison of five multiprocessor systems. Parallel Comput. 2(3): 265-282 (1985)
Conference and Workshop Papers
- 2021
- [c47]Samuel Irving, Lu Peng, Costas Busch, Jih-Kwon Peir:
BifurKTM: Approximately Consistent Distributed Transactional Memory for GPUs. PARMA-DITAM@HiPEAC 2021: 2:1-2:15 - 2018
- [c46]Qi Zeng, Rakesh Jha, Shigang Chen, Jih-Kwon Peir:
Data Locality Exploitation in Cache Compression. ICPADS 2018: 347-354 - 2017
- [c45]Xi Tao, Qi Zeng, Jih-Kwon Peir:
Hot Row Identification of DRAM Memory in a Multicore System. HP3C 2017: 71-75 - [c44]Qi Zeng, Jih-Kwon Peir:
Content-Aware Non-Volatile Cache Replacement. IPDPS 2017: 92-101 - [c43]Qi Zeng, Rakesh Jha, Jih-Kwon Peir:
Towards Energy-Efficient Multi-Level Cell STT-MRAM Caches with Content Awareness. PDCAT 2017: 336-343 - 2016
- [c42]Xi Tao, Qi Zeng, Jih-Kwon Peir, Shih-Lien Lu:
Small cache lookaside table for fast DRAM cache access. IPCCC 2016: 1-10 - [c41]Xi Tao, Qi Zeng, Jih-Kwon Peir, Shih-Lien Lu:
Runahead Cache Misses Using Bloom Filter. PDCAT 2016: 1-6 - 2014
- [c40]Xudong Shi, Feiqi Su, Jih-Kwon Peir:
Directory Lookaside Table: Enabling scalable, low-conflict, many-core cache coherence directory. ICPADS 2014: 111-118 - [c39]Jih-Kwon Peir, Shih-Chang Kevin Lai, Shih-Lien Lu, Jared Stark, Konrad Lai:
Author retrospective for bloom filtering cache misses for accurate data speculation and prefetching. ICS 25th Anniversary 2014: 65-67 - 2013
- [c38]Xi Tao, Yan Qiao, Jih-Kwon Peir, Shigang Chen, Zhuo Huang, Shih-Lien Lu:
Guided multiple hashing: Achieving near perfect balance for fast routing lookup. ICNP 2013: 1-10 - [c37]Jianmin Chen, Xi Tao, Zhen Yang, Jih-Kwon Peir, Xiaoyuan Li, Shih-Lien Lu:
Guided Region-Based GPU Scheduling: Utilizing Multi-thread Parallelism to Hide Memory Latency. IPDPS 2013: 441-451 - 2012
- [c36]Gang Liu, Jih-Kwon Peir, Victor W. Lee:
Miss-Correlation Folding: Encoding Per-Block Miss Correlations in Compressed DRAM for Data Prefetching. IPDPS 2012: 691-702 - 2011
- [c35]Jianmin Chen, Bin Li, Ying Zhang, Lu Peng, Jih-Kwon Peir:
Statistical GPU power analysis using tree-based methods. IGCC 2011: 1-6 - [c34]Jianmin Chen, Bin Li, Ying Zhang, Lu Peng, Jih-Kwon Peir:
Tree structured analysis on GPU power study. ICCD 2011: 57-64 - [c33]Ying Zhang, Lu Peng, Bin Li, Jih-Kwon Peir, Jianmin Chen:
Architecture comparisons between Nvidia and ATI GPUs: Computation parallelism and data communications. IISWC 2011: 205-215 - [c32]Zhuo Huang, Jih-Kwon Peir, Shigang Chen:
Approximately-perfect hashing: Improving network throughput through efficient off-chip routing table lookup. INFOCOM 2011: 311-315 - 2010
- [c31]Zhuo Huang, David Lin, Jih-Kwon Peir, Shigang Chen, S. M. Iftekharul Alam:
Fast routing table lookup based on deterministic multi-hashing. ICNP 2010: 31-40 - [c30]Gang Liu, Zhuo Huang, Jih-Kwon Peir, Xudong Shi:
Semantics-Aware, Timely Prefetching of Linked Data Structure. ICPADS 2010: 213-220 - [c29]Jianmin Chen, Zhuo Huang, Feiqi Su, Jih-Kwon Peir, Jeff Ho, Lu Peng:
Weak execution ordering - exploiting iterative methods on many-core GPUs. ISPASS 2010: 154-163 - 2009
- [c28]MyungKeun Yoon, Tao Li, Shigang Chen, Jih-Kwon Peir:
Fit a Spread Estimator in Small Memory. INFOCOM 2009: 504-512 - [c27]Zhuo Huang, Gang Liu, Jih-Kwon Peir:
Greedy Prefix Cache for IP Routing Lookups. ISPAN 2009: 92-97 - 2007
- [c26]Feiqi Su, Xudong Shi, Gang Liu, Ye Xia, Jih-Kwon Peir:
Comparative evaluation of multi-core cache occupancy strategies. ICPADS 2007: 1-8 - [c25]Lu Peng, Jih-Kwon Peir, Tribuvan K. Prakash, Yen-Kuang Chen, David M. Koppelman:
Memory Performance and Scalability of Intel's and AMD's Dual-Core Processors: A Case Study. IPCCC 2007: 55-64 - [c24]Xudong Shi, Feiqi Su, Jih-Kwon Peir, Ye Xia, Zhen Yang:
Modeling and Single-Pass Simulation of CMP Cache Capacity and Accessibility. ISPASS 2007: 126-135 - 2006
- [c23]Zhen Yang, Xudong Shi, Feiqi Su, Jih-Kwon Peir:
Overlapping dependent loads with addressless preload. PACT 2006: 275-284 - [c22]Xudong Shi, Zhen Yang, Jih-Kwon Peir, Lu Peng, Yen-Kuang Chen, Victor W. Lee, B. Liang:
Coterminous locality and coterminous group data prefetching on chip-multiprocessors. IPDPS 2006 - 2004
- [c21]Lu Peng, Jih-Kwon Peir, Konrad Lai:
Signature Buffer: Bridging Performance Gap between Registers and Caches. HPCA 2004: 164-175 - 2002
- [c20]Shih-Chang Lai, Shih-Lien Lu, Jih-Kwon Peir:
Ditto Processor. DSN 2002: 525-536 - [c19]Jih-Kwon Peir, Shih-Chang Lai, Shih-Lien Lu, Jared Stark, Konrad Lai:
Bloom filtering cache misses for accurate data speculation and prefetching. ICS 2002: 189-198 - 2001
- [c18]Qianrong Ma, Jih-Kwon Peir, Lu Peng, Konrad Lai:
Symbolic Cache: Fast Memory Access Based on Program Syntax Correlation of Loads and Stores. ICCD 2001: 54-61 - [c17]Byung-Kwon Chung, Jinsuo Zhang, Jih-Kwon Peir, Shih-Chang Lai, Konrad Lai:
Direct load: dependence-linked dataflow resolution of load address and cache coordinate. MICRO 2001: 76-87 - 1999
- [c16]Jang-uk In, Canming Jin, Jih-Kwon Peir, Sanjay Ranka, Sartaj Sahni:
A Framework for Matching Applications with Parallel Machines. HiPC 1999: 331-338 - 1998
- [c15]Jih-Kwon Peir, Yongjoon Lee, Windsor W. Hsu:
Capturing Dynamic Memory Reference Behavior with Adaptive Cache Topology. ASPLOS 1998: 240-250 - 1997
- [c14]Jih-Kwon Peir, Windsor W. Hsu:
Fast Cache Access with Full-Map Block Directory. ICCD 1997: 578-586 - 1996
- [c13]Jih-Kwon Peir, Windsor W. Hsu, Honesty C. Young, Shauchi Ong:
Improving Cache Performance with Balanced Tag and Data Paths. ASPLOS 1996: 268-278 - [c12]Yunn Yen Chen, Jih-Kwon Peir, Chung-Ta King:
Performance of Shared Cache on Multithreaded Architectures. PDP 1996: 541-548 - 1993
- [c11]Jih-Kwon Peir, Kimming So, Ju-Ho Tang:
Techniques to Enhance Cache Performance Across Parallel Program Sections. ICPP (1) 1993: 12-19 - 1992
- [c10]Lishing Liu, Jih-Kwon Peir:
Sampling of Cache Congruence Classes. ICCD 1992: 552-557 - 1991
- [c9]Jih-Kwon Peir, Kimming So, Ju-Ho Tang:
Inter-Section Locality of Shared Data in Parallel Programs. ICPP (1) 1991: 278-286 - [c8]Yann-Hang Lee, Sandra E. Cheung, Jih-Kwon Peir:
Consecutive Requests Traffic Model in Multistage Interconnection Networks. ICPP (1) 1991: 534-541 - [c7]Kien A. Hua, Chiang Lee, Jih-Kwon Peir:
Interconnecting Shared-Everything Systems for Efficient Parallel Query Processing. PDIS 1991: 262-270 - 1990
- [c6]Lishing Liu, Jih-Kwon Peir:
A Performance Evaluation Methodology for Coupled Multiple Supercomputers. ICPP (1) 1990: 198-202 - [c5]Kien A. Hua, Chiang Lee, Jih-Kwon Peir:
A high performance hybrid architecture for concurrent query execution. SPDP 1990: 348-351 - [c4]Jih-Kwon Peir, Yann-Hang Lee:
Improving multistage network performance under uniform and hot-spot traffics. SPDP 1990: 548-551 - 1987
- [c3]Jih-Kwon Peir, Ron Cytron:
Minimum Distance: A Method for Partitioning Recurrences for Multiprocessors. ICPP 1987: 217-225 - [c2]Hsiao-Ming Hsu, Jih-Kwon Peir, Dale B. Haidvogel:
Performance of an Ocean Circulation Model on LCAP-Abstract. PP 1987: 285 - 1986
- [c1]Jih-Kwon Peir, Daniel Gajski:
CAMP: A Programming Aide for Multiprocessors. ICPP 1986: 475-482
Reference Works
- 1997
- [r1]Windsor W. Hsu, Jih-Kwon Peir:
Busses. The Computer Science and Engineering Handbook 1997: 427-446
Coauthor Index
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