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ORCIDAbhishek Jain 0003
Person information
- affiliation: STMicroelectronics, Greater Noida, India
- affiliation: Padua University, Information Engineering Department, Italy
- affiliation: Jaypee Institute of Information Technology, ECE Department, Noida, India
Other persons with the same name
- Abhishek Jain — disambiguation page
- Abhishek Jain 0001 — Colorado State University, Fort Collins, CO, USA
- Abhishek Jain 0002 — Johns Hopkins University, USA (and 2 more)
- Abhishek Jain 0004 — Georgia Institute of Technology, Atlanta, GA, USA
- Abhishek Jain 0005 — North Carolina State University, Department of Electrical Engineering, Raleigh, NC, USA
- Abhishek Jain 0006 — State University of New York, Cloud and Big Data Laboratory, Binghamton, NY, USA
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2020 – today
- 2022
[j2]Abhishek Jain
, Andrea Mario Veggetti, Dennis Crippa, Antonio Benfante, Simone Gerardin, Marta Bagatin:
Radiation Tolerant Multi-Bit Flip-Flop System With Embedded Timing Pre-Error Sensing. IEEE J. Solid State Circuits 57(9): 2878-2890 (2022)- 2020
- [c5]Abhishek Jain, Andrea Veggetti, Dennis Crippa, Antonio Benfante, Simone Gerardin, Marta Bagatin:
Single Phase Clock Based Radiation Tolerant D Flip-flop Circuit. IOLTS 2020: 1-6
2010 – 2019
- 2016
- [j1]Abhishek Jain, Richa Gupta:
Unified and Modular Modeling and Functional Verification Framework of Real-Time Image Signal Processors. VLSI Design 2016: 7283471:1-7283471:14 (2016) - 2015
- [c4]Abhishek Jain, Richa Gupta:
Scaling the UVM_REG Model towards Automation and Simplicity of Use. VLSID 2015: 164-169 - 2014
- [i3]Abhishek Jain, Piyush Kumar Gupta, Hima Gupta, Sachish Dhar:
Accelerating SystemVerilog UVM Based VIP to Improve Methodology for Verification of Image Signal Processing Designs Using HW Emulator. CoRR abs/1401.3554 (2014) - [i2]Abhishek Jain, Hima Gupta, Sandeep Jana, Krishna Kumar:
Early Development of UVM based Verification Environment of Image Signal Processing Designs using TLM Reference Model of RTL. CoRR abs/1408.1150 (2014) - 2013
- [i1]Abhishek Jain, Giuseppe Bonanno, Hima Gupta, Ajay Goyal:
Generic System Verilog Universal Verification Methodology based Reusable Verification Environment for Efficient Verification of Image Signal Processing IPs/SoCs. CoRR abs/1301.2858 (2013) - 2012
- [c3]Abhishek Jain, Andrea Veggetti, Dennis Crippa, Pierluigi Rolandi:
On-chip delay measurement circuit. ETS 2012: 1-6 - 2010
- [c2]Abhishek Jain, Andrea Veggetti, Dennis Crippa, Pierluigi Rolandi:
An On-Chip Flip-Flop Characterization Circuit. PATMOS 2010: 41-50
2000 – 2009
- 2008
- [c1]Abhishek Jain, Madhur Agrawal, Abhinav Gupta, Vineet Khandelwal:
A novel approach to video matting using automated scribbling by motion analysis. VECIMS 2008: 25-30
Coauthor Index
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last updated on 2023-09-27 22:42 CEST by the dblp team
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