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C. V. Krishna
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2000 – 2009
- 2004
- [j2]C. V. Krishna, Abhijit Jas, Nur A. Touba:
Achieving high encoding efficiency with partial dynamic LFSR reseeding. ACM Trans. Design Autom. Electr. Syst. 9(4): 500-516 (2004) - [j1]Abhijit Jas, C. V. Krishna, Nur A. Touba:
Weighted pseudorandom hybrid BIST. IEEE Trans. Very Large Scale Integr. Syst. 12(12): 1277-1283 (2004) - [c7]C. V. Krishna, Nur A. Touba:
3-Stage Variable Length Continuous-Flow Scan Vector Decompression Scheme. VTS 2004: 79-86 - 2003
- [c6]C. V. Krishna, Nur A. Touba:
Hybrid BIST Using an Incrementally Guided LFSR. DFT 2003: 217-224 - [c5]C. V. Krishna, Nur A. Touba:
Adjustable Width Linear Combinational Scan Vector Decompression. ICCAD 2003: 863-866 - 2002
- [c4]Kartik Mohanram, C. V. Krishna, Nur A. Touba:
A methodology for automated insertion of concurrent error detection hardware in synthesizable Verilog RTL. ISCAS (1) 2002: 577-580 - [c3]C. V. Krishna, Nur A. Touba:
Reducing Test Dat Volume Using LFSR Reseeding with Seed Compression. ITC 2002: 321-330 - 2001
- [c2]C. V. Krishna, Abhijit Jas, Nur A. Touba:
Test vector encoding using partial LFSR reseeding. ITC 2001: 885-893 - [c1]Abhijit Jas, C. V. Krishna, Nur A. Touba:
Hybrid BIST Based on Weighted Pseudo-Random Testing: A New Test Resource Partitioning Scheme. VTS 2001: 2-8
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