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Hai Huang 0010

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affiliation: University of Texas at Dallas, Texas Analog Center of Excellence, Richardson, TX, USA

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Journal Articles

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2019
[j3]
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Hongda Xu, Hai Huang, Yongda Cai, Ling Du, Yuan Zhou, Benwei Xu, Datao Gong, Jingbo Ye, Yun Chiu:
A 78.5-dB SNDR Radiation- and Metastability-Tolerant Two-Step Split SAR ADC Operating Up to 75 MS/s With 24.9-mW Power Consumption in 65-nm CMOS. IEEE J. Solid State Circuits 54(2): 441-451 (2019)
2017
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Hai Huang, Ling Du, Yun Chiu:
A 1.2-GS/s 8-bit Two-Step SAR ADC in 65-nm CMOS With Passive Residue Transfer. IEEE J. Solid State Circuits 52(6): 1551-1562 (2017)
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Hai Huang, Hongda Xu, Brian Elies, Yun Chiu:
A Non-Interleaved 12-b 330-MS/s Pipelined-SAR ADC With PVT-Stabilized Dynamic Amplifier Achieving Sub-1-dB SNDR Variation. IEEE J. Solid State Circuits 52(12): 3235-3247 (2017)

Conference and Workshop Papers

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2017
[c2]
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Hai Huang, Sudipta Sarkar, Brian Elies, Yun Chiu:
28.4 A 12b 330MS/s pipelined-SAR ADC with PVT-stabilized dynamic amplifier achieving <1dB SNDR variation. ISSCC 2017: 472-473
2015
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Hai Huang, Ling Du, Yun Chiu:
A 1.2-GS/s 8-bit two-step SAR ADC in 65-nm CMOS with passive residue transfer. A-SSCC 2015: 1-4

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