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ORCIDSébastien Bilavarn
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2020 – today
- 2024
[c20]Zhuoer Li
, Sébastien Bilavarn:
Improving the Energy Efficiency of CNN Inference on FPGA Using Partial Reconfiguration. DASIP 2024: 96-109- [c19]Romain Cocogne, Sébastien Bilavarn, Mostafa El Mokadem, Khaled Douzane:
Control Enhancement of Traction Electric Drives Using Neural Network Predictive Controller. ICCAD 2024: 1-6 - 2022
- [j17]Zhuoer Li, Edgar Lemaire, Nassim Abderrahmane, Sébastien Bilavarn, Benoît Miramond:
Efficiency analysis of artificial vs. Spiking Neural Networks on FPGAs. J. Syst. Archit. 133: 102765 (2022) - [j16]Edgar Lemaire, Benoît Miramond, Sébastien Bilavarn, Hadi Saoud, Nassim Abderrahmane:
Synaptic Activity and Hardware Footprint of Spiking Neural Networks in Digital Neuromorphic Systems. ACM Trans. Embed. Comput. Syst. 21(6): 75:1-75:26 (2022) - 2020
- [c18]Edgar Lemaire, Matthieu Moretti, Lionel Daniel, Benoît Miramond, Philippe Millet, Frédéric Feresin, Sébastien Bilavarn:
An FPGA-Based Hybrid Neural Network Accelerator for Embedded Satellite Image Classification. ISCAS 2020: 1-5
2010 – 2019
- 2018
- [b2]Sébastien Bilavarn:
Modélisation, Conception Système d'Architectures Hétérogènes pour les Applications Embarquées : Eléments d'amélioration de l'efficacité énergétique des systèmes sur puce de silicium. (Modelling, Design of Heterogenous architectures for embedded Applications / Modelling, Design of Heterogenous architectures for embedded Applications : Refinement parts about power efficiency of silicon chips systems). University of Nice Sophia Antipolis, France, 2018 - [j15]Robin Bonamy, Sébastien Bilavarn, Fabrice Muller, François Duhem, Simon Heywood, Philippe Millet, Fabrice Lemonnier:
Energy efficient mapping on manycore with dynamic and partial reconfiguration: Application to a smart camera. Int. J. Circuit Theory Appl. 46(9): 1648-1662 (2018) - 2017
- [j14]Joël Wanza Weloli, Sébastien Bilavarn, Maarten de Vries, Said Derradji, Cécile Belleudy:
Efficiency modeling and exploration of 64-bit ARM compute nodes for exascale. Microprocess. Microsystems 53: 68-80 (2017) - 2016
- [j13]Robin Bonamy, Sébastien Bilavarn, Daniel Chillet, Olivier Sentieys:
Power Modeling and Exploration of Dynamic and Partially Reconfigurable Systems. J. Low Power Electron. 12(3): 172-185 (2016) - [j12]Sébastien Bilavarn, Jabran Khan, Cécile Belleudy, Muhammad Khurram Bhatti:
Effectiveness of power strategies for video applications: a practical study. J. Real Time Image Process. 12(1): 123-132 (2016) - [c17]Joël Wanza Weloli, Sébastien Bilavarn, Said Derradji, Cécile Belleudy, Sylvie Lesmanne:
Efficiency Modeling and Analysis of 64-bit ARM Clusters for HPC. DSD 2016: 342-347 - 2015
- [j11]François Duhem, Fabrice Muller, Robin Bonamy, Sébastien Bilavarn:
FoRTReSS: a flow for design space exploration of partially reconfigurable systems. Des. Autom. Embed. Syst. 19(3): 301-326 (2015) - [c16]Taheni Damak, Sébastien Bilavarn, Nouri Masmoudi:
HLS based design of a mixed architecture for H.264/AVC CAVLD. SSD 2015: 1-4 - [c15]Robin Bonamy, Sébastien Bilavarn, Fabrice Muller:
An energy-aware scheduler for dynamically reconfigurable multi-core systems. ReCoSoC 2015: 1-6 - 2014
- [j10]Robin Bonamy, Sébastien Bilavarn, Daniel Chillet, Olivier Sentieys:
Power consumption models for the use of dynamic and partial reconfiguration. Microprocess. Microsystems 38(8): 860-872 (2014) - 2013
- [c14]Jabran Khan, Sébastien Bilavarn, Muhammad Khurram Bhatti, Cécile Belleudy:
Energy Analysis of a Real-time Multiprocessor Control of Idle States. PECCS 2013: 125-130 - 2012
- [c13]Eric Senn, Daniel Chillet, Olivier Zendra, Cécile Belleudy, Sébastien Bilavarn, Rabie Ben Atitallah, Christian Samoyeau, A. Fritsch:
Open-People: Open Power and Energy Optimization PLatform and Estimator. DSD 2012: 668-675 - [c12]Jabran Khan, Sébastien Bilavarn, Cécile Belleudy:
Impact of operating points on DVFS power management. DTIS 2012: 1-6 - [c11]Robin Bonamy, Daniel Chillet, Sébastien Bilavarn, Olivier Sentieys:
Power consumption model for partial and dynamic reconfiguration. ReConFig 2012: 1-8 - 2011
- [j9]Rym Chéour, Sébastien Bilavarn, Mohamed Abid:
Exploitation of the EDF Scheduling in the Wireless Sensors Networks. Int. J. Meas. Technol. Instrum. Eng. 1(2): 14-27 (2011) - [j8]Dominique Blouin, Daniel Chillet, Eric Senn, Sébastien Bilavarn, Robin Bonamy, Christian Samoyeau:
AADL Extension to Model Classical FPGA and FPGA Embedded within a SoC. Int. J. Reconfigurable Comput. 2011: 425401:1-425401:15 (2011) - [j7]Robin Bonamy, Daniel Chillet, Olivier Sentieys, Sébastien Bilavarn:
Parallelism Level Impact on Energy Consumption in Reconfigurable Devices. SIGARCH Comput. Archit. News 39(4): 104-105 (2011) - [c10]Sébastien Bilavarn, Andrea Castagnetti, Laurent Rodriguez:
A Video Monitoring Application forWireless Sensor Networks using IEEE 802.15.4. ARCS Workshops 2011 - [c9]Bassem Ouni, Cécile Belleudy, Sébastien Bilavarn, Eric Senn:
Embedded operating systems energy overhead. DASIP 2011: 52-57 - [c8]Robin Bonamy, Daniel Chillet, Olivier Sentieys, Sébastien Bilavarn:
Towards a power and energy efficient use of partial dynamic reconfiguration. ReCoSoC 2011: 1-4 - 2010
- [j6]Sébastien Bilavarn, Cécile Belleudy, Michel Auguin, T. Dupont, Anna-Marie Fouillart:
Implantation d'un décodeur H.264 sur plateforme multiprocesseur avec gestion énergétique. Tech. Sci. Informatiques 29(2): 201-224 (2010) - [c7]Andrea Castagnetti, Cécile Belleudy, Sébastien Bilavarn, Michel Auguin:
Power Consumption Modeling for DVFS Exploitation. DSD 2010: 579-586
2000 – 2009
- 2009
- [j5]Fateh Boutekkouk, Mohamed Benmohammed, Sébastien Bilavarn, Michel Auguin:
UML2.0 Profiles for Embedded Systems and Systems On a Chip (SOCs). J. Object Technol. 8(1): 135-157 (2009) - [j4]Fateh Boutekkouk, Mohamed Benmohammed, Sébastien Bilavarn, Michel Auguin:
UML for Modelling and Performance Estimation of Embedded Systems. J. Object Technol. 8(2): 95-118 (2009) - 2008
- [c6]Sébastien Bilavarn, Cécile Belleudy, Michel Auguin, T. Dupont, Anne-Marie Fouilliart:
Embedded Multicore Implementation of a H.264 Decoder with Power Management Considerations. DSD 2008: 124-130 - [c5]Fateh Boutekkouk, Sébastien Bilavarn, Michel Auguin, Mohammed Benmohammed:
UML profile for estimating application Worst Case Execution Time on System-on-Chip. SoC 2008: 1-6 - 2006
- [j3]Jean-Philippe Diguet, Guy Gogniat, Jean Luc Philippe, Yannick Le Moullec, Sébastien Bilavarn, Christian Gamrat, Karim Ben Chehida, Michel Auguin, Xavier Fornari, Philippe Kajfasz:
EPICURE: A partitioning and co-design framework for reconfigurable computing. Microprocess. Microsystems 30(6): 367-387 (2006) - [j2]Sébastien Bilavarn, Guy Gogniat, Jean Luc Philippe, Lilian Bossuet:
Design Space Pruning Through Early Estimations of Area/Delay Tradeoffs for FPGA Implementations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(10): 1950-1968 (2006) - 2005
- [j1]Sébastien Bilavarn, Eric Debes, Pierre Vandergheynst, Jean-Philippe Diguet:
Processor Enhancements for Media Streaming Applications. J. VLSI Signal Process. 41(2): 225-234 (2005) - 2004
- [c4]Sébastien Bilavarn, Eric Debes:
Reconfigurable coprocessor for media streaming. ICME 2004: 483-486 - 2003
- [c3]Sébastien Bilavarn, Guy Gogniat, Jean Luc Philippe:
An estimation and exploration methodology from system-level specifications: application to FPGAs. FPGA 2003: 239 - [c2]Sébastien Bilavarn, Guy Gogniat, Jean Luc Philippe, Lilian Bossuet:
Fast prototyping of reconfigurable architectures from a C program. ISCAS (5) 2003: 589-592 - 2002
- [b1]Sébastien Bilavarn:
Exploration Architecturale au Niveau Comportemental - Application aux FPGAs. (Architectural Exploration in behavioral level - Application to FPGAs). University of Southern Brittany, Morbihan, France, 2002 - 2000
- [c1]Sébastien Bilavarn, Guy Gogniat, Jean Luc Philippe:
Area time power estimation for FPGA based designs at a behavioral level. ICECS 2000: 524-527
Coauthor Index
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