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2010 – 2019
- 2013
[j3]Luciano Ost
, Marcelo Mandelli, Gabriel Marchesan Almeida, Leandro Möller, Leandro Soares Indrusiak, Gilles Sassatelli, Pascal Benoit, Manfred Glesner, Michel Robert, Fernando Moraes:
Power-aware dynamic mapping heuristics for NoC-based MPSoCs using a unified model-based approach. ACM Trans. Embed. Comput. Syst. 12(3): 75:1-75:22 (2013)- 2012
- [b1]Leandro Möller:
Communication infrastructure modeling of many-core architectures. Darmstadt University of Technology, Germany, 2012, pp. 1-175 - [c19]Leandro Möller, Leandro Soares Indrusiak, Luciano Ost, Fernando Gehm Moraes, Manfred Glesner:
Comparative analysis of dynamic task mapping heuristics in heterogeneous NoC-based MPSoCs. ISSoC 2012: 1-4 - 2011
- [c18]Luciano Ost, Marcelo Mandelli, Gabriel Marchesan Almeida, Leandro Soares Indrusiak, Leandro Möller, Manfred Glesner, Gilles Sassatelli, Michel Robert, Fernando Moraes:
Exploring dynamic mapping impact on NoC-based MPSoCs performance using a model-based framework. SBCCI 2011: 185-190 - 2010
- [j2]Sanna Määttä, Leandro Möller, Leandro Soares Indrusiak, Luciano Ost, Manfred Glesner, Jari Nurmi, Fernando Moraes:
Joint Validation of Application Models and Multi-Abstraction Network-on-Chip Platforms. Int. J. Embed. Real Time Commun. Syst. 1(1): 86-101 (2010) - [c17]Leandro Möller, Peter Fischer, Fernando Moraes, Leandro Soares Indrusiak, Manfred Glesner:
Improving QoS of Multi-layer Networks-on-Chip with Partial and Dynamic Reconfiguration of Routers. FPL 2010: 229-233 - [c16]Sanna Määttä, Leandro Soares Indrusiak, Luciano Ost, Leandro Möller, Manfred Glesner, Fernando Gehm Moraes, Jari Nurmi:
A case study of hierarchically heterogeneous application modelling using UML and Ptolemy II. SoC 2010: 68-71 - [c15]Leandro Möller, André Rodrigues, Fernando Moraes, Leandro Soares Indrusiak, Manfred Glesner:
Instruction Set Simulator for MPSoCs based on NoCs and MIPS Processors. ReCoSoC 2010: 7-11
2000 – 2009
- 2009
- [c14]Haile Yu, Philip Heng Wai Leong, Heiko Hinkelmann, Leandro Möller, Manfred Glesner, Peter Zipf:
Towards a unique FPGA-based identification circuit using process variations. FPL 2009: 397-402 - [c13]Sanna Määttä, Leandro Soares Indrusiak, Luciano Ost, Leandro Möller, Manfred Glesner, Fernando Gehm Moraes, Jari Nurmi:
Characterising embedded applications using a UML profile. SoC 2009: 172-175 - 2008
- [c12]Leandro Soares Indrusiak, Luciano Ost, Leandro Möller, Fernando Moraes, Manfred Glesner:
Applying UML Interactions and Actor-Oriented Simulation to the Design Space Exploration of Network-on-Chip Interconnects. ISVLSI 2008: 491-494 - [c11]Luciano Ost, Fernando Gehm Moraes, Leandro Möller, Leandro Soares Indrusiak, Manfred Glesner, Sanna Määttä, Jari Nurmi:
A simplified executable model to evaluate latency and throughput of networks-on-chip. SBCCI 2008: 170-175 - [c10]Sanna Määttä, Leandro Soares Indrusiak, Luciano Ost, Leandro Möller, Jari Nurmi, Manfred Glesner, Fernando Moraes:
Validation of executable application models mapped onto network-on-chip platforms. SIES 2008: 118-125 - 2007
- [c9]Leandro Möller, Ismael Grehs, Ewerson Carvalho, Rafael Soares, Ney Calazans, Fernando Moraes:
A NoC-based Infrastructure to Enable Dynamic Self Reconfigurable Systems. ReCoSoC 2007: 23-30 - [i1]Aline Mello, Leandro Möller, Ney Calazans, Fernando Moraes:
MultiNoC: A Multiprocessing System Enabled by a Network on Chip. CoRR abs/0710.4843 (2007) - 2006
- [c8]Leandro Möller, Ismael Grehs, Ney Calazans, Fernando Moraes:
Reconfigurable Systems Enabled by a Network-on-Chip. FPL 2006: 1-4 - [c7]Leandro Möller, Rafael Soares, Ewerson Carvalho, Ismael Grehs, Ney Calazans, Fernando Moraes:
Infrastructure for dynamic reconfigurable systems: choices and trade-offs. SBCCI 2006: 44-49 - 2004
- [j1]Fernando Gehm Moraes, Ney Calazans, Aline Mello, Leandro Möller, Luciano Ost:
HERMES: an infrastructure for low area overhead packet-switching networks on chip. Integr. 38(1): 69-93 (2004) - [c6]Aline Mello, Leandro Möller, Ney Calazans, Fernando Gehm Moraes:
MultiNoC: A Multiprocessing System Enabled by a Network on Chip. DATE 2004: 234-239 - [c5]Leandro Möller, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Eduardo Wenzel Brião, Ewerson Carvalho, Daniel Camozzato:
FiPRe: An Implementation Model to Enable Self-Reconfigurable Applications. FPL 2004: 1042-1046 - 2003
- [c4]Fernando Gehm Moraes, Daniel Mesquita, José Carlos S. Palma, Leandro Möller, Ney Laert Vilar Calazans:
Development of a Tool-Set for Remote and Partial Reconfiguration of FPGAs. DATE 2003: 11122-11123 - [c3]Daniel Mesquita, Fernando Gehm Moraes, José Palma, Leandro Möller, Ney Laert Vilar Calazans:
Remote and Partial Reconfiguration of FPGAs: Tools and Trends. IPDPS 2003: 177 - [c2]Fernando Gehm Moraes, Aline Mello, Leandro Möller, Luciano Ost, Ney Laert Vilar Calazans:
A Low Area Overhead Packet-switched Network on Chip: Architecture and Prototyping. VLSI-SOC 2003: 318-323 - 2002
- [c1]José Carlos S. Palma, Aline Vieira de Mello, Leandro Möller, Fernando Moraes, Ney Calazans:
Core Communication Interface for FPGAs. SBCCI 2002: 183-190
Coauthor Index
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