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Yu Gong 0003
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Other persons with the same name
- Yu Gong — disambiguation page
- Yu Gong 0001
![0000-0002-3985-8691 [0000-0002-3985-8691]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png)
- Yu Gong 0002
![0000-0002-2736-4635 [0000-0002-2736-4635]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png)
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2020 – today
- 2025
[j2]Yang Sui
, Miao Yin, Yu Gong
, Bo Yuan
:
Co-Exploring Structured Sparsification and Low-Rank Tensor Decomposition for Compact DNNs. IEEE Trans. Neural Networks Learn. Syst. 36(4): 6642-6654 (2025)
[c13]Cheng Yang, Yang Sui, Jinqi Xiao, Lingyi Huang, Yu Gong, Chendi Li, Jinghua Yan, Yu Bai, Ponnuswamy Sadayappan, Xia Hu, Bo Yuan:
TopV: Compatible Token Pruning with Inference Time Optimization for Fast and Low-Memory Multimodal Vision Language Model. CVPR 2025: 19803-19813
[i6]Cheng Yang, Yang Sui, Jinqi Xiao, Lingyi Huang, Yu Gong, Chendi Li, Jinghua Yan, Yu Bai, Ponnuswamy Sadayappan, Xia Hu, Bo Yuan:
TopV: Compatible Token Pruning with Inference Time Optimization for Fast and Low-Memory Multimodal Vision Language Model. CoRR abs/2503.18278 (2025)- 2024
[c12]Lingyi Huang
, Cheng Yang
, Yu Gong
, Yang Sui
, Xiao Zang
, Anthony Goeckner
, Qi Zhu
, Bo Yuan
:
Invited: Algorithm and Hardware Co-Design for Energy-Efficient Neural SLAM. DAC 2024: 365:1-365:4
[c11]Jianfeng Song, Rongjian Liang, Yu Gong, Bo Yuan, Jiang Hu:
DiMO-Sparse: Differentiable Modeling and Optimization of Sparse CNN Dataflow and Hardware Architecture. DATE 2024: 1-6
[c10]Cheng Yang, Yang Sui, Jinqi Xiao, Lingyi Huang, Yu Gong, Yuanlin Duan, Wenqi Jia, Miao Yin, Yu Cheng, Bo Yuan:
MoE-I²: Compressing Mixture of Experts Models through Inter-Expert Pruning and Intra-Expert Low-Rank Decomposition. EMNLP (Findings) 2024: 10456-10466
[c9]Lingyi Huang, Yu Gong, Yang Sui
, Xiao Zang, Bo Yuan:
MOPED: Efficient Motion Planning Engine with Flexible Dimension Support. HPCA 2024: 483-497
[i5]Yang Sui, Miao Yin, Yu Gong, Jinqi Xiao, Huy Phan, Bo Yuan:
ELRT: Efficient Low-Rank Training for Compact Convolutional Neural Networks. CoRR abs/2401.10341 (2024)
[i4]Cheng Yang
, Yang Sui, Jinqi Xiao, Lingyi Huang, Yu Gong, Yuanlin Duan, Wenqi Jia, Miao Yin, Yu Cheng, Bo Yuan:
MoE-I2: Compressing Mixture of Experts Models through Inter-Expert Pruning and Intra-Expert Low-Rank Decomposition. CoRR abs/2411.01016 (2024)- 2023
[c8]Jinqi Xiao
, Chengming Zhang
, Yu Gong, Miao Yin, Yang Sui
, Lizhi Xiang, Dingwen Tao, Bo Yuan:
HALOC: Hardware-Aware Automatic Low-Rank Compression for Compact Neural Networks. AAAI 2023: 10464-10472
[c7]Zhangheng Li, Yu Gong, Zhenyu Zhang, Xingyun Xue, Tianlong Chen, Yi Liang, Bo Yuan, Zhangyang Wang:
Accelerable Lottery Tickets with the Mixed-Precision Quantization. CVPR Workshops 2023: 4604-4612
[c6]Jinqi Xiao
, Miao Yin, Yu Gong, Xiao Zang, Jian Ren, Bo Yuan:
COMCAT: Towards Efficient Compression and Customization of Attention-Based Vision Models. ICML 2023: 38125-38136
[c5]Yu Gong
, Miao Yin
, Lingyi Huang
, Jinqi Xiao
, Yang Sui
, Chunhua Deng
, Bo Yuan
:
ETTE: Efficient Tensor-Train-based Computing Engine for Deep Neural Networks. ISCA 2023: 68:1-68:13
[i3]Jinqi Xiao, Chengming Zhang, Yu Gong, Miao Yin, Yang Sui, Lizhi Xiang, Dingwen Tao, Bo Yuan:
HALOC: Hardware-Aware Automatic Low-Rank Compression for Compact Neural Networks. CoRR abs/2301.09422 (2023)
[i2]Jinqi Xiao, Miao Yin, Yu Gong, Xiao Zang, Jian Ren, Bo Yuan:
COMCAT: Towards Efficient Compression and Customization of Attention-Based Vision Models. CoRR abs/2305.17235 (2023)- 2022
[j1]Yu Gong
, Miao Yin
, Lingyi Huang, Chunhua Deng, Bo Yuan
:
Algorithm and Hardware Co-Design of Energy-Efficient LSTM Networks for Video Recognition With Hierarchical Tucker Tensor Decomposition. IEEE Trans. Computers 71(12): 3101-3114 (2022)
[c4]Lingyi Huang, Xiao Zang, Yu Gong, Boyang Zhang, Bo Yuan:
VLSI Hardware Architecture of Neural A* Path Planner. IEEECONF 2022: 334-338
[c3]Miao Yin, Yang Sui
, Wanzhao Yang, Xiao Zang, Yu Gong, Bo Yuan:
HODEC: Towards Efficient High-Order DEcomposed Convolutional Neural Networks. CVPR 2022: 12289-12298
[c2]Lingyi Huang, Xiao Zang, Yu Gong, Chunhua Deng, Jingang Yi, Bo Yuan:
IMG-SMP: Algorithm and Hardware Co-Design for Real-time Energy-efficient Neural Motion Planning. ACM Great Lakes Symposium on VLSI 2022: 373-377
[c1]Lingyi Huang, Xiao Zang, Yu Gong, Bo Yuan:
Hardware Architecture of Graph Neural Network-Enabled Motion Planner (Invited Paper). ICCAD 2022: 104:1-104:7
[i1]Yu Gong, Miao Yin, Lingyi Huang, Chunhua Deng, Yang Sui, Bo Yuan:
Algorithm and Hardware Co-Design of Energy-Efficient LSTM Networks for Video Recognition with Hierarchical Tucker Tensor Decomposition. CoRR abs/2212.02046 (2022)
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last updated on 2025-11-06 00:24 CET by the dblp team
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