ICCAD 2022: San Diego, CA, USA

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The Role of Graph Neural Networks in Electronic Design Automation

Compiler and System-Level Techniques for Efficient Machine Learning

Addressing Sensor Security through Hardware/Software Co-Design

Advances in Partitioning and Physical Optimization

Democratizing Design Automation with Open-Source Tools: Perspectives, Opportunities, and Challenges

Accelerators on A New Horizon

CAD for Confidentiality of Hardware IPS

Analyzing Reliability, Defects and Patterning

New Frontier in Verification Technology

Low Power Edge Intelligence

Crossbars, Analog Accelerators for Neural Networks, and Neuromorphic Computing Based on Printed Electronics

Designing DNN Accelerators

Novel Chiplet Approaches from Interconnect to System (Virtual)

Architecture for DNN Acceleration (Virtual)

Multi-Purpose Fundamental Digital Design Improvements (Virtual)

GPU Acceleration for Routing Algorithms (Virtual)

Breakthroughs in Synthesis - Infrastructure and ML Assist I (Virtual)

Smart Search (Virtual)

Reconfigurable Computing: Accelerators and Methodologies I (Virtual)

Hardware Security: Attacks and Countermeasures (Virtual)

Advanced VLSI Routing and Layout Learning

Physical Attacks and Countermeasures

Tutorial: Polynomial Formal Verification: Ensuring Correctness under Resource Constraints

Scalable Verification Technologies

Optimizing Digital Design Aspects: From Gate Sizing to Multi-Bit Flip-Flops

Energy Efficient Hardware Acceleration and Stochastic Computing

Special Session: Approximate Computing and the Efficient Machine Learning Expedition

Co-Search Methods and Tools

Reconfigurable Computing: Accelerators and Methodologies II

Compute-in-Memory for Neural Networks

Breakthroughs in Synthesis - Infrastructure and ML Assist II

In-Memory Computing Revisited

Special Session: 2022 CAD Contest at ICCAD

Architectures and Methodologies for Advanced Hardware Security

Special Session: The Dawn of Domain-Specific Hardware Accelerators for Robotic Computing

From Logical to Physical Qubits: New Models and Techniques for Mapping

Smart Embedded Systems (Virtual)

Analog/Mixed-Signal Simulation, Layout, and Packaging (Virtual)